FFT Computation With Systolic Arrays, A New Architecture

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 41, Issue 4, 1994, Pages 278-284

  Boriakoff, Valentin ^a  

^a WORCESTER POLYTECHNIC INSTITUTE   (United States)

Author keywords

Fast Fourier Transform; on line processing; systolic arrays; VLSI

Indexed keywords

EID: 0043263235     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.285710     Document Type: Article

References (21)

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