Step and flash imprint lithography: Template surface treatment and defect analysis

Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures

Volumn 18, Issue 6, 2000, Pages 3572-3577

  Bailey, T ^a   Choi, B J ^a   Colburn, M ^a   Meissl, M ^a   Shaya, S ^a   Ekerdt, J G ^a   Sreenivasan, S V ^a   Willson, C G ^a  

^a The University of Texas at Austin   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DEFECTS; ETCHING; INTERFACIAL ENERGY; MONOLAYERS; PRINTED CIRCUITS; SURFACE ROUGHNESS; SURFACE TREATMENT;

ETCH BARRIERS; SELF ASSEMBLED MONOLAYERS; STEP AND FLASH IMPRINT LITHOGRAPHY (SFIL);

LITHOGRAPHY;

EID: 0034316495     PISSN: 10711023     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.1324618     Document Type: Article

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