Design of a sense circuit for low-voltage flash memories

IEEE Journal of Solid-State Circuits

Volumn 35, Issue 10, 2000, Pages 1415-1421

  Tanzawa, Toru ^a   Takano, Yoshinori ^a   Taura, Tadayuki ^a   Atsumi, Shigeru ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); CAPACITANCE; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; MOSFET DEVICES; SEMICONDUCTOR STORAGE; SWITCHING NETWORKS; TRANSCONDUCTANCE;

BITLINE CLAMP LOAD TRANSISTOR; DATALINE SWITCHING METHOD; LOW VOLTAGE FLASH MEMORY; SENSE CIRCUIT; STRAY CAPACITANCE;

INTEGRATED CIRCUIT LAYOUT;

EID: 0034297387     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.871317     Document Type: Article

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