Optimization of word-line booster circuits for low-voltage flash memories

IEEE Journal of Solid-State Circuits

Volumn 34, Issue 8, 1999, Pages 1091-1098

  Tanzawa, Toru ^a   Atsumi, Shigeru ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CAPACITORS; DATA STORAGE EQUIPMENT; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; ELECTRIC POWER SUPPLIES TO APPARATUS; OPTIMIZATION;

BOOSTER CIRCUITS; DICKSON CHARGE PUMP CIRCUIT; FLASH MEMORIES;

ELECTRIC NETWORK ANALYSIS;

EID: 0033169552     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.777107     Document Type: Article

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