SCOPUS 정보 검색 플랫폼

Volumn 3, Issue 5, 2000, Pages 235-238

Improvements of amorphous-silicon inverted-staggered thin-film transistors using high-temperature-deposited Al gate with chemical mechanical polishing

(5) Shih, Po Sheng c Chang, Ting Chang a,b Liang, Chung Yu c Huang, Tiao Yuan a Chang, Chun Yen c

a NATIONAL NANO DEVICE LABORATORIES (Taiwan)

b NATIONAL SUN YAT SEN UNIVERSITY (Taiwan)

c NONE

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINUM; AMORPHOUS SILICON; ANNEALING; CHEMICAL POLISHING; ELECTROCHEMICAL ELECTRODES; ELECTRODEPOSITION; GATES (TRANSISTOR); HIGH TEMPERATURE EFFECTS; HIGH TEMPERATURE OPERATIONS; SURFACE ROUGHNESS; THRESHOLD VOLTAGE;

DEPOSITION TEMPERATURE; HILLOCK FORMATION;

THIN FILM TRANSISTORS;

EID: 0034188387 PISSN: 10990062 EISSN: None Source Type: Journal
DOI: 10.1149/1.1391011 Document Type: Article

Times cited : (5)

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