Developing design rules to avert cracking and debonding in integrated circuit structures

Engineering Fracture Mechanics

Volumn 66, Issue 4, 2000, Pages 387-402

  Liu, X H ^a   Suo, Z ^a   Ma, Q ^b   Fujimoto, H ^b  

^a PRINCETON UNIVERSITY   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

Design rules; Energy release rate; Finite element method; Integrated circuits; Residual stresses

Indexed keywords

CRACK INITIATION; DELAMINATION; FINITE ELEMENT METHOD; INTEGRATED CIRCUIT LAYOUT; RESIDUAL STRESSES; TENSILE STRESS; THERMAL EXPANSION;

DEBONDING; DESIGN RULES; ENERGY RELEASE RATE;

FRACTURE MECHANICS;

CIRCUIT; CRACKING; DESIGN; FRACTURE MECHANICS; RESIDUAL STRESS;

EID: 0033937363     PISSN: 00137944     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0013-7944(00)00024-2     Document Type: Article

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