A double-face bit-serial architecture for the 1-d discrete wavelet transform

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 47, Issue 1, 2000, Pages 65-71

  Marino, Francescomaria ^a  

^a POLITECNICO DI BARI   (Italy)

Author keywords

Bit serial architectures; DWT; IDWT; Vlsi for dsp

Indexed keywords

COMPUTATIONAL COMPLEXITY; DIGITAL SIGNAL PROCESSING; VLSI CIRCUITS; WAVELET TRANSFORMS;

DISCRETE WAVELET TRANSFORMS (DWT); DOUBLE-FACE BIT-SERIAL ARCHITECTURE;

LOGIC CIRCUITS;

EID: 0033897076     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.818896     Document Type: Article

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