VLSI implementation of discrete wavelet transform

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 4, Issue 4, 1996, Pages 421-433

  Grzeszczak, Aleksander ^b   Mandal, Mrinal K ^b   Panchanathan, Sethuraman ^a,b   Yeap, Tet ^a,b  

^a IEEE

^b UNIVERSITY OF OTTAWA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CASCADE CONNECTIONS; COMPUTATIONAL METHODS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SIMULATION; DELAY CIRCUITS; HIGH PASS FILTERS; INTEGRATED CIRCUIT LAYOUT; INTERCONNECTION NETWORKS; INTERFACES (COMPUTER); LOW PASS FILTERS; WAVELET TRANSFORMS;

COMMUNICATION BUSES; DATA FINITE PRECISION; DISCRETE WAVELET TRANSFORM; INPUT DELAY; ON CHIP INTERFACE CIRCUITS; REGISTER BANKS; WAVELET FILTER COEFFICIENTS;

VLSI CIRCUITS;

EID: 0030387823     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.544407     Document Type: Article

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