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Volumn 2, Issue 1, 1990, Pages 17-27

A polyphase architecture for serial-input convolvers

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SYSTEMS, DIGITAL - FAULT TOLERANT CAPABILITY; COMPUTERS, DIGITAL - MULTIPLYING CIRCUITS;

EID: 0025489517     PISSN: 09225773     EISSN: 1573109X     Source Type: Journal    
DOI: 10.1007/BF00931033     Document Type: Article
Times cited : (3)

References (10)
  • 3
    • 84936357591 scopus 로고    scopus 로고
    • J.V. McCanny, R.A. Evans, and J.G. McWhirter, “Use of BiDirectional Data Flow in Bit-Level Systolic Array Chips,”Electronic Letters, Vol. 22, 1986.
  • 5
    • 84936307660 scopus 로고    scopus 로고
    • L. Dadda, “Polyphase Convolvers,”Proc. 9th IEEE Symp. Comput. Arithmetic, 1989, pp. 78–85.
  • 6
    • 84936330633 scopus 로고    scopus 로고
    • L. Dadda and L. Breveglieri, “Serial-Input Serial-Output Bit Sliced Convolver,”Proc. ICCD '88, 1988, pp. 490–495.
  • 7
    • 84936328247 scopus 로고    scopus 로고
    • L. Dadda, “Fast Multipliers for Two's-Complement Numbers in Serial Form,”Proc. 7th IEEE Symp. Comput. Arithmetic, Urbana, IL, 1985.
  • 8
    • 84936308232 scopus 로고    scopus 로고
    • L. Breveglieri, L. Dadda, and D. Sciuto, “Testing of Serial-Input Convolvers,”Euromicro '89, Cologne, 1989.
  • 9
    • 84936373123 scopus 로고    scopus 로고
    • A. Balboni, L. Breveglieri, L. Dadda, and D. Sciuto, “A Comparative Evaluation of Serial Convolvers,”IFIP Workshop on Parallel Architectures on Silicon, Grenoble, 1989, pp. 309–326.
  • 10
    • 84936323081 scopus 로고
    • A Single Wafer Bit-Sliced Convolver: An Optimum Statistical Solution for the Implementation of Redundancy
    • Prentice Hall, New York
    • (1989) Systolic Array Processors , pp. 514-524
    • Lasserre, S.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.