Switching well noise modeling and minimization strategy for digital circuits with a controllable threshold voltage scheme

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 19, Issue 6, 2000, Pages 654-670

  Koyama, Akio ^a   Uchida, Makio ^a   Aida, Tatsuhiro ^a   Kudo, JuN'Ya ^a   Tsuge, Masatoshi ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; APPROXIMATION THEORY; COMPUTER SIMULATION; DIGITAL INTEGRATED CIRCUITS; ELECTRIC POWER SUPPLIES TO APPARATUS; EQUIVALENT CIRCUITS; LEAKAGE CURRENTS; SEMICONDUCTOR DEVICE MODELS; THRESHOLD VOLTAGE; VOLTAGE CONTROL;

SOFTWARE PACKAGE SPICE; SWITCHING WELL NOISE; SYSTEM-ON-A-CHIP; THERMAL INSTABILITY;

SPURIOUS SIGNAL NOISE;

EID: 0033717699     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.848087     Document Type: Article

References (19)

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