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Volumn 46, Issue 8, 1999, Pages 1804-1807

An analytical model for interaction of sipos layer with underlying silicon of soi resurf devices

Author keywords

Breakdown voltage; Coupling of potentials; Modeling; Sipos field plate; Soi resurf diode

Indexed keywords

COMPUTER SIMULATION; ELECTRIC BREAKDOWN; POLYCRYSTALLINE MATERIALS; SEMICONDUCTING SILICON; SEMICONDUCTOR DIODES; SILICON ON INSULATOR TECHNOLOGY;

EID: 0033169522     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.777174     Document Type: Article
Times cited : (17)

References (8)
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  • 3
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    • D. Jaume, G. Charitat, J. M. Reynes, and P. Rüssel, "High-voltage planar devices using field plate and semi-resistive layers," IEEE Trans. Electron Devices, vol. 38, pp. 1681-1684, July 1991
    • IEEE Trans. Electron Devices
    • Jaume, D.1    Charitat, G.2    Reynes, J.M.3    Rüssel, P.4
  • 4
    • 0022958454 scopus 로고    scopus 로고
    • "The effects of SIPOS passivation on DC and switching performance of high voltage MOS transistors," in
    • 1986, pp. 646-649
    • S. Mukherjee, C. J. Chou, K. Shaw, D. McArthur, and V. Rumennik, "The effects of SIPOS passivation on DC and switching performance of high voltage MOS transistors," in IEDM Tech. Dig., 1986, pp. 646-649
    • IEDM Tech. Dig.
    • Mukherjee, S.1    Chou, C.J.2    Shaw, K.3    McArthur, D.4    Rumennik, V.5
  • 5
    • 85014937772 scopus 로고    scopus 로고
    • "Modeling and charac- Terization of SIPOS passivated, high voltage, N- and P-channel lateral RESURF type DMOSFETS," in
    • 1992, pp. 288-292
    • T. Sakai, K. C. So, Z. Shen, and T. P. Chow, "Modeling and charac- terization of SIPOS passivated, high voltage, N- and P-channel lateral RESURF type DMOSFETS," in Proc. ISPSD, 1992, pp. 288-292
    • Proc. ISPSD
    • Sakai, T.1    So, K.C.2    Shen, Z.3    Chow, T.P.4
  • 6
    • 0032098028 scopus 로고    scopus 로고
    • "Analytical model for the surface field distribution of SOI RESURF devices,"
    • vol. 45, pp. 1374-1376, June 1998
    • S. K. Chung and S. Y. Han, "Analytical model for the surface field distribution of SOI RESURF devices," IEEE Trans. Electron Devices, vol. 45, pp. 1374-1376, June 1998
    • IEEE Trans. Electron Devices
    • Chung, S.K.1    Han, S.Y.2
  • 7
    • 0001695018 scopus 로고    scopus 로고
    • "Calculation of avalanche breakdown of silicon p-n junction,"
    • vol. 10, pp. 39-43, 1967
    • W. Fulop, "Calculation of avalanche breakdown of silicon p-n junction," Solid-State Electron., vol. 10, pp. 39-43, 1967
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  • 8
    • 0029752898 scopus 로고    scopus 로고
    • "Analytical model for minimum drift region length of SOI RESURF diodes,"
    • vol. 17, pp. 22-24, Jan. 1996.
    • S. K. Chung, S. Y. Han, J. C. Shin, Y. I. Choi, and S. B. Kirn, "Analytical model for minimum drift region length of SOI RESURF diodes," IEEE Electron Device Lett., vol. 17, pp. 22-24, Jan. 1996.
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    • Chung, S.K.1    Han, S.Y.2    Shin, J.C.3    Choi, Y.I.4    Kirn, S.B.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.