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Volumn 87, Issue 4, 1999, Pages 659-667

MOSFET Scaling-The Driver of VLSI Technology

Author keywords

Cmos integrated circuits; Mosfet scaling; Mosfets; Scaling; Very large scale integration (vlsi)

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; SEMICONDUCTOR STORAGE; VLSI CIRCUITS;

EID: 0033115977     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/JPROC.1999.752521     Document Type: Article
Times cited : (65)

References (54)
  • 6
    • 33744729615 scopus 로고
    • An investigation of potential MOS transistor memories
    • P. Pleshko and L. Terman, An investigation of potential MOS transistor memories,IEEE Trans. Electron. Comput., vol. EC15, pp. 423-427, Aug. 1966.
    • (1966) IEEE Trans. Electron. Comput., Vol. EC , vol.15 , pp. 423-427
    • Pleshko, P.1    Terman, L.2
  • 8
    • 33744720039 scopus 로고
    • Multiple word/bit line redundancy for semiconductor memories
    • S. E. Schuster, Multiple word/bit line redundancy for semiconductor memories, IBM Internal Rep. RC 3410, June 17, 1971.
    • (1971) IBM Internal Rep. RC 3410, June 17
    • Schuster, S.E.1
  • 9
    • 0018021595 scopus 로고
    • Multiple word/bit line redundancy for semiconductor memories,IEEE J. Solid-State Circuits, vol. SC-13, p. 698, Oct. 1978.
    • (1978) IEEE J. Solid-State Circuits, Vol. SC , vol.13 , pp. 698
  • 10
    • 33744732077 scopus 로고
    • Sense amplifer for IGFET memory
    • D. L. Critchlow, Sense amplifer for IGFET memory,IBM Tech. Disclosure Bulletin, vol. 13, no. 6, p. 1720, 1970.
    • (1970) IBM Tech. Disclosure Bulletin , vol.13 , Issue.6 , pp. 1720
    • Critchlow, D.L.1
  • 13
    • 85034504784 scopus 로고    scopus 로고
    • Design of micron MOS switching devices, presented at IEDM, Dec. 1972, notes used in presentation.
    • Presented at IEDM, Dec , vol.1972
  • 14
    • 85034505740 scopus 로고
    • The starting point of an idea-The MOS scaling rule (in Japanese)
    • R. Dennard, The starting point of an idea-The MOS scaling rule (in Japanese), Nikkei Microdevices No. 91, pp. 139-40, Jan. 1993.
    • (1993) Nikkei Microdevices No. , vol.91 , pp. 139-140
    • Dennard, R.1
  • 16
    • 0000901940 scopus 로고
    • Fundamental limitations in microelectronics-I. MOS technology
    • B. Hoeneisen and C. Mead, Fundamental limitations in microelectronics-I. MOS technology,Solid State Electron., vol. 15, no. 7, pp. 819-829, July 1972.
    • (1972) Solid State Electron. , vol.15 , Issue.7 , pp. 819-829
    • Hoeneisen, B.1    Mead, C.2
  • 17
    • 0015330654 scopus 로고
    • Ion-implanted complementary MOS transistors in low-voltaae circuits
    • R. Swanson and J. Meindl, Ion-implanted complementary MOS transistors in low-voltaae circuits,IEEE J. Solid-State Circuits, vol. SC-7, pp. 146-153, Apr. 1972.
    • (1972) IEEE J. Solid-State Circuits, Vol. SC , vol.7 , pp. 146-153
    • Swanson, R.1    Meindl, J.2
  • 18
    • 0015673708 scopus 로고
    • An 8 Kb random-access memory chip using the one-device FET cell
    • W. Huffman and H. Kalter, An 8 Kb random-access memory chip using the one-device FET cell,IEEE J. Solid-State Circuits, vol. SC-8, pp. 298-305, Oct. 1973.
    • (1973) IEEE J. Solid-State Circuits, Vol. SC , vol.8 , pp. 298-305
    • Huffman, W.1    Kalter, H.2
  • 19
    • 0016572696 scopus 로고
    • Fabrication of a miniature 8-Kbit memory chip using electron-beam exposure
    • Nov./Dec.
    • H. Yu, R. Dennard, T. H. P. Chang, C. Osburn, V. DiLonardo, and H. Luhn, Fabrication of a miniature 8-Kbit memory chip using electron-beam exposure,J. Vac. Sci. Technol., vol. 12, no. 6, p. 1297, Nov./Dec. 1975.
    • (1975) J. Vac. Sci. Technol. , vol.12 , Issue.6 , pp. 1297
    • Yu, H.1    Dennard, R.2    Chang, T.H.P.3    Osburn, C.4    Dilonardo, V.5    Luhn, H.6
  • 21
    • 0015347227 scopus 로고
    • A high performance JV-channel MOSLSI using depletion-type load elements
    • T. Masuhara, M. Nagata, and N. Hashimoto, A high performance JV-channel MOSLSI using depletion-type load elements,IEEE J. Solid-State Circuits, vol. SC-7, pp. 224-231, June 1972.
    • (1972) IEEE J. Solid-State Circuits, Vol. SC , vol.7 , pp. 224-231
    • Masuhara, T.1    Nagata, M.2    Hashimoto, N.3
  • 32
    • 0032206116 scopus 로고    scopus 로고
    • multimedia applications, IEEE J. Solid-Slate Circuits, vol. 33, pp. 1640-1648, Nov. 1998.
    • (1998) IEEE J. Solid-Slate Circuits , vol.33 , pp. 1640-1648
  • 36
    • 0025449455 scopus 로고
    • Trends in megabit DRAM circuit design
    • K. Itoh, Trends in megabit DRAM circuit design,IEEE J. Solid-State Circuits, vol. 25, pp. 778-789, June 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , pp. 778-789
    • Itoh, K.1
  • 37
    • 0029288557 scopus 로고
    • Trends in low-power RAM circuit technologies
    • K. Itoh, K. Sasaki, and Y. Nakagome, Trends in low-power RAM circuit technologies,Proc. IEEE, vol. 83, pp. 524-543, Apr. 1995.
    • (1995) Proc. IEEE , vol.83 , pp. 524-543
    • Itoh, K.1    Sasaki, K.2    Nakagome, Y.3
  • 39
    • 0029292445 scopus 로고
    • CMOS scaling for high performance and low power-The next ten years
    • B. Davari, R. Dennard, and G. Shahidi, CMOS scaling for high performance and low power-The next ten years,Proc. IEEE, vol. 83, pp. 595-606, Apr. 1995.
    • (1995) Proc. IEEE , vol.83 , pp. 595-606
    • Davari, B.1    Dennard, R.2    Shahidi, G.3
  • 40
    • 0029292870 scopus 로고
    • Technology leverage for ultra-low power information systems
    • H. Stork, Technology leverage for ultra-low power information systems,Proc. IEEE, vol. 83, pp. 607-618, Apr. 1995.
    • (1995) Proc. IEEE , vol.83 , pp. 607-618
    • Stork, H.1
  • 41
    • 0029292398 scopus 로고
    • Low-power microelectronics: Retrospective and prospect
    • J. Meindl, Low-power microelectronics: Retrospective and prospect,Proc. IEEE, vol. 83, pp. 619-635, Apr. 1995.
    • (1995) Proc. IEEE , vol.83 , pp. 619-635
    • Meindl, J.1
  • 43
  • 44
    • 0021406605 scopus 로고
    • Generalized scaling theory and its application to a 1/4 micron MOSFET design
    • G. Baccarani, M. Wordeman, and R. Dennard, Generalized scaling theory and its application to a 1/4 micron MOSFET design,IEEE Trans. Electron Devices, vol. 31, pp. 452-62, 1984.
    • (1984) IEEE Trans. Electron Devices , vol.31 , pp. 452-462
    • Baccarani, G.1    Wordeman, M.2    Dennard, R.3
  • 46
    • 0003104503 scopus 로고    scopus 로고
    • Interconnection scaling to 1 GHz and beyond
    • A. Stamper, Interconnection scaling to 1 GHz and beyond,IBM MicroNews, vol. 2, no. 4, pp. 1-7, 1998.
    • (1998) IBM MicroNews , vol.2 , Issue.4 , pp. 1-7
    • Stamper, A.1
  • 47
    • 0032026510 scopus 로고    scopus 로고
    • A stochastic wire-length distribution for gigascale integration (GSI), Parts I and II
    • J. Davis, V. De, and J. Meindl, A stochastic wire-length distribution for gigascale integration (GSI), Parts I and II,IEEE Trans. Electron Devices, vol. 45, pp. 580-597, Mar. 1998.
    • (1998) IEEE Trans. Electron Devices , vol.45 , pp. 580-597
    • Davis, J.1    De V2    Meindl, J.3
  • 48
    • 0031232996 scopus 로고    scopus 로고
    • Scaling theory in modern VLSI: Factors affecting interconnects, wire length and clock speed
    • D. Ferry and L. Akers, Scaling theory in modern VLSI: Factors affecting interconnects, wire length and clock speed,IEEE Circuits and Devices, vol. 13, pp. 41-44, Sept. 1997.
    • (1997) IEEE Circuits and Devices , vol.13 , pp. 41-44
    • Ferry, D.1    Akers, L.2
  • 50
    • 0029207481 scopus 로고
    • Performance trends in high-end processors
    • G. Sai-Halasz, Performance trends in high-end processors,Proc. IEEE, vol. 83, p. 20, Jan. 1995.
    • (1995) Proc. IEEE , vol.83 , pp. 20
    • Sai-Halasz, G.1
  • 52
    • 85034516168 scopus 로고    scopus 로고
    • Design of largescale integrated logic circuits using MOS devices, in
    • D. Critchlow, R. Dennard, and S. Schuster, Design of largescale integrated logic circuits using MOS devices, in Proc. 6th Annii. Microelectronics Symp., St. Louis, MO, June 1967, pp. C5-1-C5-8.
    • Proc. , vol.6 , pp. 1967
    • Critchlow, D.1    Dennard, R.2    Schuster, S.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.