Efficient techniques for dynamic test sequence compaction

IEEE Transactions on Computers

Volumn 48, Issue 3, 1999, Pages 323-330

  Rudnick, Elizabeth M ^a,b   Patel, Janak H ^a,b  

^a IEEE   (United States)

^b University of Illinois at Urbana Champaign   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TEST GENERATION; TEST SEQUENCE COMPACTION;

COMPUTER SIMULATION; ELECTRIC NETWORK ANALYSIS; GENETIC ALGORITHMS; VECTORS;

SEQUENTIAL CIRCUITS;

EID: 0033100683     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.754998     Document Type: Article

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