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Volumn , Issue , 1996, Pages 53-61
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Dynamic test compaction for synchronous sequential circuits using static compaction techniques
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTATIONAL COMPLEXITY;
FAULT TOLERANT COMPUTER SYSTEMS;
HEURISTIC METHODS;
INTEGRATED CIRCUIT TESTING;
LOCAL AREA NETWORKS;
VECTORS;
DYNAMIC COMPACTION HEURISTICS;
SYNCHRONOUS SEQUENTIAL CIRCUITS;
TEST SEQUENCES;
SEQUENTIAL CIRCUITS;
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EID: 0029715106
PISSN: 07313071
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (20)
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References (8)
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