A novel approach to chip-to-chip communication using a single flux quantum pulse

IEEE Transactions on Applied Superconductivity

Volumn 9, Issue 2 PART 3, 1999, Pages 4049-4052

  Maezawa, Masaaki ^a   Yamamori, Hirotake ^a   Shoji, Akira ^a  

^a ELECTROTECHNICAL LABORATORY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DATA TRANSFER; FABRICATION; FLIP CHIP DEVICES; IMPEDANCE MATCHING (ELECTRIC); JOSEPHSON JUNCTION DEVICES; SUBSTRATES;

CHIP TO CHIP COMMUNICATION; SINGLE FLUX QUANTUM PULSE;

ELECTRONICS PACKAGING;

EID: 0032685434     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/77.783916     Document Type: Article

References (12)

1. H. C. Jones and D. J. Hetrell, "The characteristics of chip-to-chip Signal propagation in a package suitable for superconducting circuit," IBM J.Res. Develop., vol. 24, pp. 172-177, March 1980.
2. K. Aoki, Y. Tazoh, and H. Yosikiyo. "Low crosstalk packaging design for Josephson logic circuits," IEEE Trims. Mugn., vol. MAO-21. pp. 741-744, March 1985.
3. S. Tanahashi. T. Kubo, K. Kawabata, R. Jikuhara, G. Kaji. M. Terasawa. H. Nakagawa, M. Aoyagi, I. Kurosawa, S. Takada, "Superconducting wiring in multichip module for Josephson LSI circuits, " J/tti.J. Appl. Phy.s.. vol. 32, pp. L898-L900, July, 1993.
4. T. Ogashiwa, H- Nakagawa, H. Akmioto. H. Shigyo, and S. Tak.-ida. "Flip-chip bonding using superconducting solder bumps." .//>..J. ,!/>/;J. Phy.s., vol. 34, pp. L4043-L4046, July. 1995.
5. R. D. Sandell, G. Akerling, and A. D. Smith, "Multi-chip packaging for high speed superconducting Circuits," IEEE. Trims. Api'l. Sitpcrct'iiiL. vol.5, pp. 3160-3163, June 1997
6. L. A. Abelson, R. N. Elmadjian, G. L. Kerber, and A.D. Smith. "Superconductive multi-chip module process for high speed digital applications," IEEE. Trims. Appl. Supermini., vol. 7, pp. 2627-2629 June 1997.
7. K. E. Yokoyama, G. Akerling, A. D. Smith, and M. Wire. "Robusi superconducting die attach process." IEEE. Trans. Appl. Snpi't'ciuuL. vol. 7, pp. 2631-2634, June 1997.
8. B. J. Dalrymple, M. Leung, R. D. Sandell, J. Spago, T. Pham. and A. Spooner, "Multi-GBPS operation of flipped chip MVTL circuits." IEEE. Trims. Appl. Superamd., vol. 7. pp. 2693-2696, June 1997.
9. A. H. Miklich, A. H. Worsham, D. L. Miller, and J. X. PiyybysJ.. "Circuit for chip-to-chip transportation of bits from single flux quantum circuits," IEEE. Trims. Appl. Siiperconil., vol. 7. pp. 227X-228 I.June 1997.
10. J. X. Przybysz, D. L. Miller, S. S. Martinet, J. Kang. A. H. Woisham. and M. L. Farich, "Interface circuits for chip-to-chip data transfer at GHz rate," IEEE. Trims. Appl Snpirctiml., vol. 7, pp. 2657-2660. June 1997.
11. S. Polonsky and D. Schneider, "Towards broadband communications between RSFQ chips,'1 IEEE. Trans. Appl. Supermini., vol. 7. pp. 2818-2821, June 1997.
12. J. J. Licari, Mullichip Module Design, Fabrication. & Testing. New York City, NY: McGraw-Hill Inc., 1995.