LOW CROSSTALK PACKAGING DESIGN FOR JOSEPHSON LOGIC CIRCUITS.

IEEE Transactions on Magnetics

Volumn MAG-21, Issue 2, 1985, Pages

  Aoki, Katsuhiko ^a   Tazoh, Yasuo ^a   Yoshikiyo, Haruo ^a  

^a NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

LOGIC CIRCUITS;

FLIP-CHIP BONDING; LOW CROSSTALK PACKAGING; NOISE DISTRIBUTION;

SUPERCONDUCTING DEVICES;

EID: 0021384816     PISSN: 00189464     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (7)