Polished TFT's: Surface roughness reduction and its correlation to device performance improvement

IEEE Transactions on Electron Devices

Volumn 44, Issue 3, 1997, Pages 455-463

  Chan, Alice B Y ^a   Nguyen, Cuong T ^a   Ko, Ping K ^a   Chan, Simon T H ^a   Simon Wong, S ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

AMORPHOUS SILICON; ANNEALING; ATOMIC FORCE MICROSCOPY; CHEMICAL POLISHING; CHEMICAL VAPOR DEPOSITION; CRYSTALLIZATION; ELECTRIC BREAKDOWN; ELECTRIC CURRENTS; ELECTRIC FIELD EFFECTS; SILICON WAFERS; SURFACE ROUGHNESS; TRANSMISSION ELECTRON MICROSCOPY;

CHEMICAL MECHANICAL POLISHING; DIELECTRIC BREAKDOWN STRENGTH; DRAIN CURRENT; POLYSILICON THIN FILM TRANSISTORS; SHORT CHANNEL EFFECTS; SURFACE ROUGHNESS REDUCTION; THRESHOLD VOLTAGE;

THIN FILM TRANSISTORS;

EID: 0031103601     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.556156     Document Type: Article

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