The formation and annealing of hot-carrier-induced degradation in Poly-Si TFT's, MOSFET's, and SOI devices, and similarities to state-creation in aSi : H

IEEE Transactions on Electron Devices

Volumn 43, Issue 3, 1996, Pages 450-456

  Young, N D ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

AMORPHOUS SILICON; ANNEALING; DIFFUSION IN GASES; GATES (TRANSISTOR); HOT CARRIERS; HYDROGEN; INTERFACES (MATERIALS); MOSFET DEVICES; SILICON ON INSULATOR TECHNOLOGY; STRESSES; THERMAL EFFECTS; THIN FILM TRANSISTORS;

GATE BIAS ANNEALING; GATE OXIDE; HYDROGEN DIFFUSION; TEMPERATURE DEPENDENCE;

SEMICONDUCTOR DEVICES;

EID: 0030106203     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.485660     Document Type: Article

References (15)

1. A. Kohno, T. Sameshima, N. Sann, M. Sekiya, and M. Hare, High performance poly-Si TFT's fabricated using pulsed laser annealing and plasma CVD with low temperature processing, IEEE Trans. Electron Devices vol. 42, no. 2, p. 251, Feh. 1995.
2. N. D. Young and J. R. Ayres, Negative gate bias instability in polycrystalline silicon TFT's, IEEE Trans. Electron Devices, vol. 42. no. 9, pp. 1623-1627, Sept. 1995.
3. S. D. Brotherlon. I R. Ayres and N. D. Young, Low temperature PolySi TFT's for liquid crystal display addressing, Solid State Electron., vol. 134, no. 7, p. 671, 1991.
4. S. D. Brotherton, J. R. Ayres, D. J. McCulloch, and N. D, Young, Fabrication and characterisation of poly-Si TFT's on glass, in Physical and Technical Problems of SOI Structures and Devices, J. P. Collinge, Ed. Amsterdam, The Netherlands: Kluwer, 1995, pp. 183-198.
5. N. D. Young, A. Gill, and M. J. Edwards, Hot carrier degradation in low temperature processed poly-Si TFT's, Setnicond. Sei. Technoi, vol. 7, p. 1183, 1992.
6. B. Doyle, M. Bourcerie, J-C Marchetaux, and A. Boudou, Interface state creation and charge trapping in the medium to high gate voltage range during hot-carrier stressing of n-MOS transistors, IEEE Trans Electron Devices, vol. 37, no. 3, p. 744, Mar. 1990.
7. E. Takeda, A. Shimizy, and T. Hagiwara, Role of hot hole injection in hut carrier effects and the small degraded channel region in MOSFET' s, IEEE Electron Device Lett., vol. EDL-4, no. 9, p. 329, 1983.
8. J. R. Ayres and N. D. Young, Hot carrier effects in devices and circuits formed from poly-Si, in IEE Proc. Circuits Devices Syst., vol. 141, no. 1, 1994, p. 38.
9. S. K. Lai and D. R. Young. Effects of avalanche injection of electrons into silicon dioxide-generation of fast and slow interface states, J. Appl. Phys., vol. 52, no. 10, p. 6231, 1989.
10. N. D. Young and A. Gill, State creation and hole trapping in poly-Si TFT's at high drain bias, Setnicond. Sei. Technoi., vol. 5, p. 728, 1990.
11. J. W. Corbett, J. L. Lindstrom, S. J. Pearton and A. J. Taveudale, Passivation in silicon, Solar Cells, vol. 24, p. 127, 1988.
12. R. W. Lee, R. C. Franks and D. E. Swets, Diffusion of hydrogen and deuterium in fused quartz, J. Chem. Phys., vol. 35, p. 1451, 1962.
13. J. R. Ayres, S. D. Brotherton and N. D. Young, Low temperature poly-Si for LCD addressing, Optoelectronics, vol. 7, no. 2, p. 301, 1992.
14. U. Mitra, B. Rossi and B. Khan, Mechanism of plasma hydrogénation of polysilicon thin film transistors, J. Electrochem. Soc., vol. 138, no. 11, p. 3420, 1991.
15. S. C. Deane, M. J. Powell, J. R. Hughes, I. D. French and W. I. Milne, Thermal bias annealing evidence for the defect pool in amorphous silicon thin film transistors. Appl. Phys. Lett., vol. 57, p. 1416, 1990.