A Single-Chip Digitally Calibrated 5.15-5.825-GHz 0.18-μm CMOS Transceiver for 802.11a Wireless LAN

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 12, 2003, Pages 2221-2231

  Vassiliou, Iason ^a   Vavelidis, Kostis ^b   Georgantas, Theodore ^b   Plevridis, Sofoklis ^b   Haralabidis, Nikos ^b   Kamoulakos, George ^b   Kapnistis, Charalambos ^b   Kavadias, Spyros ^b   Kokolakis, Yiannis ^b   Merakos, Panagiotis ^b   Rudell, Jacques C ^c   Yamanaka, Akira ^a   Bouras, Stamatis ^b   Bouras, Ilias ^b  

^a Athena Semiconductors   (United States)

^b Athena Semiconductors SA   (Greece)

^c Berkana Wireless   (United States)

Author keywords

5 GHz; 802.11a; Digital calibration; Direct conversion; Orthogonal frequency division multiplexing (OFDM); RF CMOS; RF transceiver; System on a chip (SOC); Wireless; Wireless LAN (WLAN)

Indexed keywords

ALGORITHMS; ANALOG TO DIGITAL CONVERSION; BANDWIDTH; CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; FREQUENCY MODULATION; LOCAL AREA NETWORKS; ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; PHASE LOCKED LOOPS; POWER AMPLIFIERS; QUADRATURE AMPLITUDE MODULATION; RADIO; VARIABLE FREQUENCY OSCILLATORS; WIRELESS TELECOMMUNICATION SYSTEMS;

DIGITAL CALIBRATION; DIRECT CONVERSION; SYSTEM-ON-A-CHIP (SOC);

TRANSCEIVERS;

EID: 9144243660     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.819086     Document Type: Conference Paper

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