Hardware/software instruction set configurability for system-on-chip processors

Proceedings - Design Automation Conference

Volumn , Issue , 2001, Pages 184-188

  Wang, Albert ^a   Killian, Earl ^a   Maydan, Dior ^a   Rowen, Chris ^a  

^a Tensilica Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; PROGRAM DEBUGGING; REAL TIME SYSTEMS; REDUCED INSTRUCTION SET COMPUTING;

SYSTEM-ON-CHIP PROCESSORS;

PROGRAM PROCESSORS;

EID: 0034846651     PISSN: 0738100X     EISSN: None     Source Type: Journal    
DOI: 10.1109/DAC.2001.156132     Document Type: Article

References (7)

1. Architectural evaluation of flexible digital signal processing for wireless receivers
2. ISDL: An instruction set description language for retargetability
3. LISA - Machine description language and generic machine model for HW/SW co-design
4. Describing instructions set processors using nML