Encoding of processor instruction sets with explicit concurrency control

IET Computers and Digital Techniques

Volumn 5, Issue 6, 2011, Pages 427-439

  Mokhov, A ^a   Alekseyev, A ^a   Yakovlev, A ^a  

^a NEWCASTLE UNIVERSITY   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER AIDED SOFTWARE ENGINEERING; ENCODING (SYMBOLS); FORMAL METHODS; INTEGRATED CIRCUIT DESIGN; MICROCONTROLLERS; SIGNAL ENCODING;

BOOLEAN SATISFIABILITY; DESIGN AUTOMATIONS; DESIGN OPTIMALITY; EFFICIENT SPECIFICATIONS; EFFICIENT SYNTHESIS; FUNCTIONAL COMPOSITIONS; INSTRUCTION CODES; INSTRUCTION SET;

CONCURRENCY CONTROL;

EID: 85006557151     PISSN: 17518601     EISSN: None     Source Type: Journal    
DOI: 10.1049/iet-cdt.2010.0158     Document Type: Article

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