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Volumn 59, Issue 11, 2010, Pages 1480-1493

Conditional partial order graphs: Model, synthesis, and application

Author keywords

asynchronous circuits; concurrency; Logic synthesis; microarchitecture; partial orders

Indexed keywords

ASYNCHRONOUS CIRCUITS; CONCURRENCY; LOGIC SYNTHESIS; MICRO ARCHITECTURES; PARTIAL ORDER;

EID: 77957664392     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2010.58     Document Type: Article
Times cited : (34)

References (21)
  • 1
    • 77957682233 scopus 로고    scopus 로고
    • International Technology Roadmap for Semiconductors (ITRS ?07). http://www.itrs.net/Links/2007ITRS/Home2007.htm, 2007.
    • (2007)
  • 3
    • 0031096959 scopus 로고    scopus 로고
    • Petrify: A tool for manipulating concurrent specifications and synthesis of asynchronous controllers
    • J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev, "Petrify: A Tool for Manipulating Concurrent Specifications and Synthesis of Asynchronous Controllers," IEICE Trans. Information and Systems, vol.E80-D, no.3, pp. 315-325, 1997.
    • (1997) IEICE Trans. Information and Systems , vol.E80-D , Issue.3 , pp. 315-325
    • Cortadella, J.1    Kishinevsky, M.2    Kondratyev, A.3    Lavagno, L.4    Yakovlev, A.5
  • 16
    • 0033079595 scopus 로고    scopus 로고
    • Scanning the technology: Applications of asynchronous circuits
    • K. van Berkel, M. Josephs, and S. Nowick, "Scanning the Technology: Applications of Asynchronous Circuits," Proc. IEEE, 1999.
    • (1999) Proc. IEEE
    • Van Berkel, K.1    Josephs, M.2    Nowick, S.3
  • 18
    • 0002391456 scopus 로고
    • Delay insensitive codes-an overview
    • T. Verhoeff, "Delay Insensitive Codes-An Overview," Distributed Computing, vol.3, no.1, pp. 1-8, 1988.
    • (1988) Distributed Computing , vol.3 , Issue.1 , pp. 1-8
    • Verhoeff, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.