Automatic modification of sequential circuits for self-checking implementation

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn 2003-January, Issue , 2003, Pages 417-424

  Metra, Cecilia ^a   Di Francescantonio, Stefano ^a   Omaña, Martin ^a  

^a UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; DEFECTS; DESIGN FOR TESTABILITY; FAULT TOLERANCE; RECONFIGURABLE HARDWARE; SEQUENTIAL CIRCUITS; VLSI CIRCUITS;

CONVENTIONAL SYNTHESIS; INTERNAL STRUCTURE; SELF CHECKING; SYNTHESIS TOOL; TRANSIENT FAULTS; VHDL DESCRIPTION; XILINX FPGA;

COMPUTER CIRCUITS;

EID: 84971324288     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TSM.2005.1250139     Document Type: Conference Paper

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