A scan-BIST environment for testing embedded memories

Proceedings of the 8th IEEE International On-Line Testing Workshop, IOLTW 2002

Volumn , Issue , 2002, Pages 211-217

  Karimi, F ^a   Lombardi, F ^b  

^a LTX Corp   (United States)

^b Northeastern University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOUNDARY SCAN; CONTROLLABILITY AND OBSERVABILITIES; EMBEDDED MEMORY; IEEE 1149.1; MEMORY CONFIGURATION; PROGRAMMABILITY; SEED-ALGORITHM; TESTING REQUIREMENTS;

MEMORY ARCHITECTURE;

EID: 84962713136     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/OLT.2002.1030221     Document Type: Conference Paper

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