Fault models and tests for two-port memories

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1998, Pages 401-410

  Van de Goor, A J ^a   Hamdioui, S ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CLASSIFICATION (OF INFORMATION); ELECTRIC FAULT LOCATION; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; RANDOM ACCESS STORAGE; TOPOLOGY;

FAULT MODELS;

DATA STORAGE EQUIPMENT;

EID: 0032313245     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)