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Volumn , Issue , 2003, Pages 343-350

The potential of compression to improve memory system performance, power consumption, and cost

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; DATA COMPRESSION; DATA STORAGE EQUIPMENT; DATA TRANSFER; EVALUATION; MARKOV PROCESSES; MATHEMATICAL MODELS; PERFORMANCE; SYSTEMS ANALYSIS; COSTS; DIGITAL ARITHMETIC; DIGITAL STORAGE; INTEGER PROGRAMMING; PROGRAM PROCESSORS;

EID: 84954461159     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/pccc.2003.1203717     Document Type: Conference Paper
Times cited : (10)

References (29)
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  • 6
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    • SHADE: A fast instruction-set simulator for execution profiling
    • May
    • B. Cmelik and D. Keppel. SHADE: A Fast Instruction-set Simulator for Execution Profiling. ACM SIGMETRICS Performance Evaluation Review, 22(1): 128-137, May 1994.
    • (1994) ACM SIGMETRICS Performance Evaluation Review , vol.22 , Issue.1 , pp. 128-137
    • Cmelik, B.1    Keppel, D.2
  • 7
    • 0003701565 scopus 로고    scopus 로고
    • Codepack[tm]: Code compression for powerPC processors
    • IBM White Paper; May 2000
    • M. Game and A. Booker Codepack[tm]: Code Compression for PowerPC Processors. IBM White Paper available at: http://www-3.ibm.com/chips/techlib.nsf/products/CodePack, May 2000.
    • Game, M.1    Booker, A.2
  • 9
    • 0003789113 scopus 로고    scopus 로고
    • MIPS16: High-density MIPS for the embedded market
    • K.D. Kissell. MIPS16: High-density MIPS for the Embedded Market. http://www.mips.com/Documentation/MIPS16whitepaper.pdf, 1997.
    • (1997)
    • Kissell, K.D.1
  • 13
    • 85062124053 scopus 로고    scopus 로고
    • Code Compression for DSP. Technical Report CSE-R-380-98, EECS Department, University of Michigan, Ann Arbor, MI
    • C. Lefurgy and T. Mudge. Code Compression for DSP. Technical Report CSE-R-380-98, EECS Department, University of Michigan, Ann Arbor, MI, 1998.
    • (1998)
    • Lefurgy, C.1    Mudge, T.2
  • 14
    • 0033338503 scopus 로고    scopus 로고
    • SAMC: A code compression algorithm for embedded processors
    • December
    • H. Lekatsas and W. Wolf, SAMC: A Code Compression Algorithm for Embedded Processors. IEEE Transactions on Computer-aided Design, 18(12): 1689-1701, December 1999.
    • (1999) IEEE Transactions on Computer-aided Design , vol.18 , Issue.12 , pp. 1689-1701
    • Lekatsas, H.1    Wolf, W.2
  • 19
    • 0003450887 scopus 로고    scopus 로고
    • CACTI 3.0: An integrated cache cycle timing, power, and area model
    • Technical Report WRL Research Report 2001/2, Compaq Western Research Laboratory, August
    • P. Shivakumar and N.P. Jouppi. CACTI 3.0: An Integrated Cache Cycle Timing, Power, and Area Model. Technical Report WRL Research Report 2001/2, Compaq Western Research Laboratory, August 2001.
    • (2001)
    • Shivakumar, P.1    Jouppi, N.P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.