Design methodologies for system level IP

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 1998, Pages 286-289

  Martin, Grant ^a  

^a CADENCE DESIGN SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN METHODOLOGY; IP BLOCK; LEVELS OF ABSTRACTION; PRACTICAL SOLUTIONS; SYSTEM LEVELS;

PRODUCTIVITY;

PRODUCT DESIGN;

EID: 84893694892     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1998.655869     Document Type: Conference Paper

References (8)

1. Virtual Socket Interface Alliance Architecture Document. V 1.0, March, 1997, p. 1. © VSI Alliance. See the VSI-A web site at URL: http://www.vsi.org.
2. G. Martin, "HW-SW Co-Design: A Perspective", EDA Vision, Volume 1, Number 1, October 1997 (on-line magazine: URL: http://www.dacafe.com/ EDAVision/Issue1/EDAVision.1-3a.html).
3. Gary Smith, Dataquest, Private Communication, June 1997. Gary Smith notes that designers in Japan as of January 1997 are ramping up with RTL-level synthesis very fast, compared to 1.5 years earlier.
4. J. Rowson, "Virtual prototyping", Proceedings of CICC 1997, May, 1997, pp. 89-94.
5. M. Hunt and J. Rowson, "Blocking in a system on a chip", IEEE Spectrum, November 1996, pp. 35-41.
6. F. Balarin, M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, C. Passerone, A. Sangiovanni-Vincentelli, E. Sentovich, K. Suzuki, and B. Tabbara, Hardware-Software Co-Design of Embedded Systems, Kluwer Academic Publishers, Dordrecht, The Netherlands, 1997.
7. J. Rowson and A. Sangiovanni-Vincentelli, "Interface-based design". Proceedings of the 34th. Design Automation Conference, 1997, pp. 178-183.
8. G. Martin and B. Salefski, "Methodology and Technology for Design of Communications and Multimedia Products via System-Level IP Integration", Proceedings of DATE 98, February, 1998.