A structural encoding technique for the synthesis of asynchronous circuits

Proceedings - International Conference on Application of Concurrency to System Design, ACSD

Volumn 2001-January, Issue , 2001, Pages 157-166

  Carmona, J ^a   Cortadella, J ^a   Pastor, E ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; ENCODING (SYMBOLS); PETRI NETS; RECONFIGURABLE HARDWARE; SPECIFICATIONS; SYSTEMS ANALYSIS;

ASYNCHRONOUS CIRCUITS; AUTOMATIC SYNTHESIS; CIRCUIT IMPLEMENTATION; CONTROL SPECIFICATIONS; ENCODING TECHNIQUES; EXHAUSTIVE ENUMERATION; FREE-CHOICE PETRI NETS; STRUCTURAL METHODS;

ASYNCHRONOUS SEQUENTIAL LOGIC;

EID: 84952780389     PISSN: 15504808     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CSD.2001.981773     Document Type: Conference Paper

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