Non-intrusive design of concurrently self-testable FSMs

Proceedings of the Asian Test Symposium

Volumn 2002-January, Issue , 2002, Pages 33-38

  Drineas, P ^a   Makris, Y ^a  

^a YALE UNIVERSITY   (United States)

Author keywords

Built in self test; Circuit faults; Circuit testing; Costs; Delay; Design methodology; Electrical fault detection; Encoding; Fault detection; Hardware

Indexed keywords

BUILT-IN SELF TEST; COMPUTER HARDWARE; CONVOLUTIONAL CODES; COSTS; ELECTRIC FAULT LOCATION; ENCODING (SYMBOLS); ERROR DETECTION; HARDWARE;

CIRCUIT FAULTS; CIRCUIT TESTING; DELAY; DESIGN METHODOLOGY; ELECTRICAL FAULT DETECTIONS;

FAULT DETECTION;

EID: 84949796709     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ATS.2002.1181681     Document Type: Conference Paper

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