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Volumn 2001-January, Issue , 2001, Pages 253-258

Design and analysis of new protection structures for smart power technology with controlled trigger and holding voltage

Author keywords

Appropriate technology; Automotive applications; Breakdown voltage; Electrostatic discharge; Low voltage; Microelectronics; Power transistors; Protection; Temperature; Voltage control

Indexed keywords

ELECTRIC BREAKDOWN; ELECTROSTATIC DISCHARGE; MICROELECTRONICS; TEMPERATURE; VOLTAGE CONTROL;

EID: 84949767329     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RELPHY.2001.922910     Document Type: Conference Paper
Times cited : (25)

References (12)
  • 2
    • 0033279221 scopus 로고    scopus 로고
    • Investigations on double-diffused MOS (DMOS) transistors under ESD zap conditions
    • G. Boselli, S. Meeuwsen, T. Mouthaan, F. Kuper, "Investigations on double-diffused MOS (DMOS) transistors under ESD zap conditions" in Proc. EOS/ESD Symp., 1999, pp. 11-18.
    • (1999) Proc. EOS/ESD Symp. , pp. 11-18
    • Boselli, G.1    Meeuwsen, S.2    Mouthaan, T.3    Kuper, F.4
  • 3
    • 0006985229 scopus 로고    scopus 로고
    • Wide range control of sustaining voltage of ESD protection elements realized in smart power technology
    • H. Goßner, T.Muller-Lynch, K. Esmark, M. Stecher, "Wide range control of sustaining voltage of ESD protection elements realized in smart power technology" in Proc. EOS/ESD Symp., 1999, pp. 19-27.
    • (1999) Proc. EOS/ESD Symp. , pp. 19-27
    • Goßner, H.1    Muller-Lynch, T.2    Esmark, K.3    Stecher, M.4
  • 6
    • 0028737473 scopus 로고
    • Device Integration for ESD Robustness of High Voltage Power MOSFETs
    • C. Duvvury, J. Rodriguez, C. Jones, M. Smayling, "Device Integration for ESD Robustness of High Voltage Power MOSFETs" in IEDM Tech. Dig., 1994, pp. 407-410.
    • (1994) IEDM Tech. Dig. , pp. 407-410
    • Duvvury, C.1    Rodriguez, J.2    Jones, C.3    Smayling, M.4
  • 9
    • 0004915775 scopus 로고    scopus 로고
    • Analysis and Compact Modeling of a vertical grounded-base NPN bipolar transistor used as an ESD Protection in a smart power technology
    • G. Bertrand, C. Delage, M. Bafleur, N. Nolhier, J.M. Dorkel, Q. Nguyen, N. Mauran, P. Perdu, "Analysis and Compact Modeling of a vertical grounded-base NPN bipolar transistor used as an ESD Protection in a smart power technology" in Proc. IEEE BCTM, 2000, pp.28-31.
    • (2000) Proc. IEEE BCTM , pp. 28-31
    • Bertrand, G.1    Delage, C.2    Bafleur, M.3    Nolhier, N.4    Dorkel, J.M.5    Nguyen, Q.6    Mauran, N.7    Perdu, P.8
  • 12
    • 0032312467 scopus 로고    scopus 로고
    • Pitfalls when correlating TLP, HBM and MM testing
    • G. Notermans, P. de Jong, F. Kuper, "Pitfalls when correlating TLP, HBM and MM testing" in Proc. EOS/ESD Symp., 1998, pp. 170-176.
    • (1998) Proc. EOS/ESD Symp. , pp. 170-176
    • Notermans, G.1    De Jong, P.2    Kuper, F.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.