ESD robustness of smart-power protection structures evaluated by means of HBM and TLP tests

Annual Proceedings - Reliability Physics (Symposium)

Volumn , Issue , 2000, Pages 270-275

  Meneghesso, G ^a   Santirosi, S ^b   Novarini, E ^b   Contiero, C ^b   Zanoni, E ^a  

^a UNIVERSITY OF PADOVA   (Italy)

^b STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; CORRELATION METHODS; ELECTRIC DISCHARGES; ELECTROSTATICS; FAILURE ANALYSIS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS;

ELECTROSTATIC DISCHARGES; HUMAN BODY MODELS (HBM); SMART POWER PROTECTION STRUCTURES; TRANSMISSION LINE PULSE (TLP) METHOD;

CMOS INTEGRATED CIRCUITS;

EID: 0033750114     PISSN: 00999512     EISSN: None     Source Type: Journal    
DOI: 10.1109/RELPHY.2000.843926     Document Type: Article

References (11)

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