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Volumn 2002-January, Issue , 2002, Pages 211-215

On-chip interconnects for next generation system-on-chips

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DESIGN; DISTRIBUTED COMPUTER SYSTEMS; INTEGRATED CIRCUIT INTERCONNECTS; MICROFABRICATION; MICROPROCESSOR CHIPS; SYSTEM-ON-CHIP;

EID: 84949448972     PISSN: 10630988     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASIC.2002.1158058     Document Type: Conference Paper
Times cited : (21)

References (16)
  • 6
    • 0034848112 scopus 로고    scopus 로고
    • Route packets, not wires: On-chip interconnection networks
    • W.J. Dally and B. Towles, "Route packets, not wires: On-chip interconnection networks," in Proceedings of DAC 2001, 2001, pp. 684-689.
    • (2001) Proceedings of DAC , vol.2001 , pp. 684-689
    • Dally, W.J.1    Towles, B.2
  • 7
    • 0034516483 scopus 로고    scopus 로고
    • Virtual data space - Load balancing for irregular applications
    • T. Decker, "Virtual data space - load balancing for irregular applications," Parallel Computing, vol. 26, no. 13-14, pp. 1825-1860, 2000.
    • (2000) Parallel Computing , vol.26 , Issue.13-14 , pp. 1825-1860
    • Decker, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.