|
Volumn , Issue , 2000, Pages 297-301
|
High level estimation of the area and power consumption of on-chip interconnects
a
|
Author keywords
[No Author keywords available]
|
Indexed keywords
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
CMOS INTEGRATED CIRCUITS;
ENERGY UTILIZATION;
GATES (TRANSISTOR);
MATHEMATICAL MODELS;
MULTIPLEXING;
ON-CHIP INTERCONNECTS;
POWER CONSUMPTION;
MICROPROCESSOR CHIPS;
|
EID: 0033681846
PISSN: 10630988
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (16)
|
References (5)
|