Design issues for high-performance active routers

IEEE Journal on Selected Areas in Communications

Volumn 19, Issue 3, 2001, Pages 404-409

  Wolf, Tilman ^b   Turner, Jonathan S ^a,b  

^a IEEE   (United States)

^b WASHINGTON UNIVERSITY   (United States)

Author keywords

Active networks; Multiprocessor system on a chip; Programmable network benchmark; Router design

Indexed keywords

MULTIPROCESSOR SYSTEM ON A CHIP; PROGRAMMABLE NETWORK BENCHMARK; ROUTER DESIGN;

CACHE MEMORY; CHANNEL CAPACITY; INTERCONNECTION NETWORKS; MULTIPROCESSING SYSTEMS; PACKET SWITCHING; SYSTEMS ANALYSIS; TELECOMMUNICATION LINKS;

ROUTERS;

EID: 0035271157     PISSN: 07338716     EISSN: None     Source Type: Journal    
DOI: 10.1109/49.917702     Document Type: Article

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