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Volumn 1855, Issue , 2000, Pages 521-537

Verifying advanced microarchitectures that support speculation and exceptions

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; RECORDING INSTRUMENTS;

EID: 84944407953     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/10722167_39     Document Type: Conference Paper
Times cited : (25)

References (16)
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    • Sergey Berezin, Armin Biere, Edmund Clarke, and Yunshan Zu. Com- bining symbolic model checking with uninterpreted functions for out-of- order processor verification. In Gopalakrishnan and Windley [GW98], pages 369-386.
    • Gopalakrishnan and Windley [GW98] , pp. 369-386
    • Berezin, S.1    Biere, A.2    Clarke, E.3    Yunshan, Z.4
  • 2
    • 84957091519 scopus 로고    scopus 로고
    • Exploiting positive equality in a logic of equality with uninterpreted functions
    • Randal Bryant, Steven German, and Miroslav Velev. Exploiting positive equality in a logic of equality with uninterpreted functions. In Halbwachs and Peled [HP99], pages 470-482.
    • Halbwachs and Peled [HP99 , pp. 470-482
    • Bryant, R.1    German, S.2    Velev, M.3
  • 5
    • 84958594221 scopus 로고    scopus 로고
    • A proof of correctness of a processor implementing Tomasulo's algorithm without a reorder buffer
    • Ravi Hosabettu, Ganesh Gopalakrishnan, and Mandayam Srivas. A proof of correctness of a processor implementing Tomasulo's algorithm without a reorder buffer. In Pierre and Kropf [PK99], pages 8-22.
    • Pierre and Kropf [PK99] , pp. 8-22
    • Hosabettu, R.1    Gopalakrishnan, G.2    Srivas, M.3
  • 8
    • 33846505764 scopus 로고    scopus 로고
    • Decom- posing the proof of correctness of pipelined microprocessors
    • Ravi Hosabettu, Mandayam Srivas, and Ganesh Gopalakrishnan. Decom- posing the proof of correctness of pipelined microprocessors. In Hu and Vardi [HV98], pages 122-134.
    • Hu and Vardi [HV98] , pp. 122-134
    • Hosabettu, R.1    Srivas, M.2    Gopalakrishnan, G.3
  • 9
    • 84957082109 scopus 로고    scopus 로고
    • Proof of correctness of a processor with reorder buffer using the completion functions approach
    • Ravi Hosabettu, Mandayam Srivas, and Ganesh Gopalakrishnan. Proof of correctness of a processor with reorder buffer using the completion functions approach. In Halbwachs and Peled [HP99], pages 47-59.
    • Halbwachs and Peled [HP99] , pp. 47-59
    • Hosabettu, R.1    Srivas, M.2    Gopalakrishnan, G.3
  • 11
    • 84948986759 scopus 로고    scopus 로고
    • Reducing manual ab- straction in formal verification of out-of-order execution
    • Robert Jones, Jens Skakkebaek, and David Dill. Reducing manual ab- straction in formal verification of out-of-order execution. In Gopalakris- hnan and Windley [GW98], pages 2-17.
    • Gopalakris- Hnan and Windley [GW98] , pp. 2-17
    • Jones, R.1    Skakkebaek, J.2    Dill, D.3
  • 12
    • 84944415514 scopus 로고    scopus 로고
    • Verification of an implementation of Tomasulo's algo- rithm by compositional model checking
    • Ken McMillan
    • Ken McMillan. Verification of an implementation of Tomasulo's algo- rithm by compositional model checking. In Hu and Vardi [HV98], pages 110-121.
    • Hu and Vardi [HV98] , pp. 110-121
  • 13
    • 0029251055 scopus 로고
    • Formal verification for fault-tolerant architectures: Prolegomena to the design of PVS
    • February
    • Sam Owre, John Rushby, Natarajan Shankar, and Friedrich von Henke. Formal verification for fault-tolerant architectures: Prolegomena to the design of PVS. IEEE Transactions on Software Engineering, 21(2):107-125, February 1995.
    • (1995) IEEE Transactions on Software Engineering , vol.21 , Issue.2 , pp. 107-125
    • Owre, S.1    Rushby, J.2    Shankar, N.3    Von Henke, F.4
  • 14
    • 84948983108 scopus 로고    scopus 로고
    • Verification of data-insensitive cir- cuits: An in-order-retirement case study
    • Amir Pnueli and Tamarah Arons.: Verification of data-insensitive cir- cuits: An in-order-retirement case study. In Gopalakrishnan and Windley [GW98], pages 351-368.
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    • Pnueli, A.1    Arons, T.2
  • 15
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    • Correct Hardware Design and Verification Method
    • editors, Bad Herrenalb, Germany, September, Springer- Verlag
    • Laurence Pierre and Thomas Kropf, editors. Correct Hardware Design and Verification Method, CHARME '99, volume 1703 of Lecture Notes in Computer Science, Bad Herrenalb, Germany, September 1999. Springer- Verlag.
    • (1999) CHARME '99, Volume 1703 of Lecture Notes in Computer Science
    • Pierre, L.1    Kropf, T.2
  • 16
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    • Results of the verification of a comples pipelined machine model
    • J. Sawada and W.A. Hunt, Jr. Results of the verification of a comples pipelined machine model. In Pierre and Kropf [PK99], pages 313-316.
    • Pierre and Kropf [PK99] , pp. 313-316
    • Sawada, J.1    Hunt, W.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.