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Volumn 2003-January, Issue , 2003, Pages 315-325

Flexible compiler-managed L0 buffers for clustered VLIW processors

Author keywords

Computational modeling; Computer architecture; Delay; Electronic mail; Energy consumption; Filters; Microarchitecture; Processor scheduling; VLIW; Wire

Indexed keywords

BENCHMARKING; CACHE MEMORY; COMPUTER ARCHITECTURE; ELECTRONIC MAIL; ELECTRONIC MAIL FILTERS; ENERGY UTILIZATION; FILTERS (FOR FLUIDS); PROGRAM COMPILERS; SCHEDULING; WIRE;

EID: 84944397775     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2003.1253205     Document Type: Conference Paper
Times cited : (13)

References (25)
  • 6
    • 0019610938 scopus 로고
    • An Approach to Scientific Array Processing: The Architectural Design of the AP120B/FPS-164 Family
    • A. Charlesworth, "An Approach to Scientific Array Processing: The Architectural Design of the AP120B/FPS-164 Family", in Computer, 14(9), pp.18-27, 1981
    • (1981) Computer , vol.14 , Issue.9 , pp. 18-27
    • Charlesworth, A.1
  • 9
    • 0033888003 scopus 로고    scopus 로고
    • The TigerSharc DSP Architecture
    • Jan-Feb.
    • J. Fridman and Zvi Greefield, "The TigerSharc DSP Architecture", IEEE Micro, pp. 66-76, Jan-Feb. 2000
    • (2000) IEEE Micro , pp. 66-76
    • Fridman, J.1    Greefield, Z.2
  • 12
    • 0002327718 scopus 로고    scopus 로고
    • Digital 21264 Sets New Standard
    • Oct.
    • L. Gwennap, "Digital 21264 Sets New Standard", Microprocessor Report, 10(14), Oct. 1996
    • (1996) Microprocessor Report , vol.10 , Issue.14
    • Gwennap, L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.