Input Versus Output Queueing on a Space-Division Packet Switch

IEEE Transactions on Communications

Volumn 35, Issue 12, 1987, Pages 1347-1356

  Karol, Mark J ^a   Hluchyj, Michael G ^a   Morgan, Samuel P ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL COMMUNICATION SYSTEMS; PROBABILITY - QUEUEING THEORY;

PACKET WAITING TIME; QUEUEING MODELS; SPACE-DIVISION PACKET SWITCH; SPACE-DIVISION SWITCHING;

DATA TRANSMISSION;

EID: 0023670354     PISSN: 00906778     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCOM.1987.1096719     Document Type: Note

References (13)

1. J.S. Turner and L.F. Wyatt, “A packet network architecture for integrated services,” in GLOBECOM′83 Conf. Rec., Nov. 1983, pp. 45–50.
2. J.J. Kulzer and W.A. Montgomery, “Statistical switching architectures for future services,” in Proc. Int. Switching Symp., May 1984.
3. T.-Y. Feng, “A survey of interconnection networks,” Computer, vol. 14, pp. 12–27, Dec. 1981.
4. D.M. Dias and M. Kumar, “Packet switching in N log N multistage networks,” in GLOBECOM′84 Conf. Rec., Nov. 1984, pp. 114–120.
5. Y.-C. Jenq, “Performance analysis of a packet switch based on a single buffered Banyan network,” IEEE J. Select. Areas Commun., vol. SAC-1, pp. 1014–1021, Dec. 1983.
6. T. Meisling, “Discrete-time queueing theory,” Oper. Res., vol. 6, pp. 96–105, Jan.-Feb. 1958.
7. I. Rubin, “Access-control disciplines for multiaccess communication channels: Reservation and TDMA schemes,” IEEE Trans. Inform. Theory, vol. IT-25, pp. 516–536, Sept. 1979.
8. L. Kleinrock, Queueing Systems, Vol. 1: Theory. New York: Wiley, 1975.
9. D. Gross and C.M. Harris, Fundamentals of Queueing Theory. New York: Wiley, 1974.
10. P.J. Burke, “Delays in single-server queues with batch input,” Oper. Res., vol. 23, pp. 830–833, July-Aug. 1975.
11. F. Baskett and A.J. Smith, “Interference in multiprocessor computer systems with interleaved memory,” Commun. ACM, vol. 19, pp. 327–334, June 1976.
12. D.P. Bhandarkar, “Analysis of memory interference in multiprocessors,” IEEE Trans. Comput., vol. C-24, pp. 897–908, Sept. 1975.
13. Y.S. Yeh, M.G. Hluchyj, and A.S. Acampora, “The knockout switch: A simple, modular architecture for high-performance packet switching,” in Proc. Int. Switching Symp., Phoenix, AZ, Mar. 1987, pp. 801–808.