메뉴 건너뛰기




Volumn 2, Issue , 2003, Pages

An innovative scheduling scheme for high-speed network processors

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE EQUIPMENT; PROGRAM PROCESSORS; QUALITY OF SERVICE; REAL TIME SYSTEMS; SCHEDULING;

EID: 0037746737     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (5)

References (8)
  • 1
    • 55849139961 scopus 로고    scopus 로고
    • Processing and scheduling components in an innovative network processor architecture
    • January 4-8, New Delhi, India
    • K. Vlachos et al. "Processing and Scheduling Components in an Innovative Network Processor Architecture", 16th International Conference on VLSI Design, January 4-8 2003, New Delhi, India.
    • (2003) 16th International Conference on VLSI Design
    • Vlachos, K.1
  • 2
    • 0035104695 scopus 로고    scopus 로고
    • Next generation network processor technologies & building blocks for fast packet forwarding technologies
    • Jan.
    • W. Büx, et al. "Next Generation Network Processor Technologies & Building Blocks for Fast Packet Forwarding Technologies", IEEE Communications Magazine, pp 70-77, Jan. 2001.
    • (2001) IEEE Communications Magazine , pp. 70-77
    • Büx, W.1
  • 3
    • 0038101200 scopus 로고    scopus 로고
    • Bringing real-time scheduling theory and practice closer for multimedia computing
    • Philadelphia, Pennsylvania, USA, May
    • R. Gopalakrishnan, G. M. Parulkar, "Bringing Real-Time Scheduling Theory And Practice Closer For Multimedia Computing", in Proc. of ACM SIGMETRICS 96, Philadelphia, Pennsylvania, USA, May 1996.
    • (1996) Proc. of ACM SIGMETRICS 96
    • Gopalakrishnan, R.1    Parulkar, G.M.2
  • 4
    • 0028320392 scopus 로고
    • Scheduling algorithms and operating systems support for real-time systems
    • Jan.
    • K. Ramamritham and J. A. Stankovic, "Scheduling algorithms and operating systems support for real-time systems", Proc. IEEE, vol.82, no.1, pp.55-67, Jan. 1994.
    • (1994) Proc. IEEE , vol.82 , Issue.1 , pp. 55-67
    • Ramamritham, K.1    Stankovic, J.A.2
  • 5
    • 0031358793 scopus 로고    scopus 로고
    • Hardware implementations of fair queuing algorithms for asynchronous transfer mode networks
    • Dec.
    • A. Varma, D. Stilliadis, "Hardware Implementations of Fair Queuing Algorithms for Asynchronous Transfer Mode Networks", IEEE Communications Magazine, pp54-68, Dec. 1997
    • (1997) IEEE Communications Magazine , pp. 54-68
    • Varma, A.1    Stilliadis, D.2
  • 6
    • 0034857901 scopus 로고    scopus 로고
    • Efficient per-flow queueing in DRAM at OC-192 line rate using out-of-order execution techniques
    • Helsinki, Finland, June
    • A. Nikologiannis, M. Katevenis, "Efficient Per-Flow Queueing in DRAM at OC-192 Line Rate using Out-of-Order Execution Techniques", ICC2001, Helsinki, Finland, June 2001.
    • (2001) ICC2001
    • Nikologiannis, A.1    Katevenis, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.