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Volumn 58, Issue , 2015, Pages 146-147

Batteryless Sub-nW Cortex-M0+ processor with dynamic leakage-suppression logic

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC BATTERIES; SENSOR NODES;

EID: 84940735749     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2015.7062968     Document Type: Conference Paper
Times cited : (92)

References (8)
  • 1
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    • Feb
    • A. Wang and A. Chandrakasan, "A 180mV FFT Processor using Subthreshold Circuit Techniques, " ISSCC Dig. Tech. Papers, pp. 292-293, Feb. 2004
    • (2004) ISSCC Dig. Tech. Papers , pp. 292-293
    • Wang, A.1    Chandrakasan, A.2
  • 2
    • 63449098455 scopus 로고    scopus 로고
    • A low-voltage processor for sensing applications with Picowatt Standby Mode
    • S. Hanson, et al., "A Low-Voltage Processor for Sensing Applications With Picowatt Standby Mode, " IEEE J. Solid-State Circuits, vol. 44, no. 4, pp. 1145-115, 2009
    • (2009) IEEE J. Solid-State Circuits , vol.44 , Issue.4 , pp. 1145-2115
    • Hanson, S.1
  • 3
    • 84860671642 scopus 로고    scopus 로고
    • A modular 1mm3 die-stacked sensing platform with optical Communication and Multi-Modal Energy Harvesting
    • Feb
    • Y. Lee, et al., "A Modular 1mm3 Die-Stacked Sensing Platform with Optical Communication and Multi-Modal Energy Harvesting, " ISSCC Dig. Tech. Papers, pp. 402-403, Feb. 2012
    • (2012) ISSCC Dig. Tech. Papers , pp. 402-403
    • Lee, Y.1
  • 5
    • 70349207507 scopus 로고    scopus 로고
    • Development of near hermetic silicon/glass cavities for Packaging of Integrated Lithium Micro Batteries
    • R. Hahn, et al., "Development of Near Hermetic Silicon/Glass Cavities for Packaging of Integrated Lithium Micro Batteries, " Symp. on Design, Test, Integration and Packaging of MEMS/MOEMS, pp. 292-299, 2009
    • (2009) Symp. on Design, Test, Integration and Packaging of MEMS/MOEMS , pp. 292-299
    • Hahn, R.1
  • 6
    • 79955721005 scopus 로고    scopus 로고
    • A 62mV 0.13μm CMOS standard-cell-based design technique using Schmitt-trigger logic
    • Feb
    • N. Lotze and Y. Manoli, "A 62mV 0.13μm CMOS standard-cell-based design technique using Schmitt-trigger logic, " ISSCC Dig. Tech. Papers, pp. 340-342, Feb. 2011
    • (2011) ISSCC Dig. Tech. Papers , pp. 340-342
    • Lotze, N.1    Manoli, Y.2
  • 7
    • 84898077415 scopus 로고    scopus 로고
    • A 3nw fully integrated energy harvester based on self-Oscillating Switched-Capacitor DC-DC converter
    • Feb
    • W. Jung, et al., "A 3nW Fully Integrated Energy Harvester Based on Self-Oscillating Switched-Capacitor DC-DC converter, " ISSCC Dig. Tech. Papers, pp. 398-399, Feb. 2014
    • (2014) ISSCC Dig. Tech. Papers , pp. 398-399
    • Jung, W.1
  • 8
    • 84655166985 scopus 로고    scopus 로고
    • A super-pipelined energy efficient subthreshold 240 ms/s FFT Core in 65 nm CMOS
    • D. Jeon, et al., "A Super-Pipelined Energy Efficient Subthreshold 240 MS/s FFT Core in 65 nm CMOS, " IEEE J. Solid-State Circuits, vol. 47, no. 1, pp. 23-34, 2012
    • (2012) IEEE J. Solid-State Circuits , vol.47 , Issue.1 , pp. 23-34
    • Jeon, D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.