메뉴 건너뛰기




Volumn , Issue , 2014, Pages 1990-1997

Run-time reconfiguration to tolerate core failures for real-time embedded applications on NoC manycore platforms

Author keywords

[No Author keywords available]

Indexed keywords

INTEGER PROGRAMMING; NETWORK-ON-CHIP; POLYNOMIAL APPROXIMATION; QUADRATIC PROGRAMMING; UBIQUITOUS COMPUTING;

EID: 84903956965     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCC.and.EUC.2013.287     Document Type: Conference Paper
Times cited : (8)

References (25)
  • 2
    • 27344444925 scopus 로고    scopus 로고
    • A router architecture for connectionoriented service guarantees in the mango clockless network-on-chip
    • DATE, march
    • T. Bjerregaard and J. Sparso, "A router architecture for connectionoriented service guarantees in the mango clockless network-on-chip", in Proc. of IEEE/ACM Design, Automation and Test in Europe Conference, ser. DATE, march 2005, pp. 1226-1231.
    • (2005) Proc. of IEEE/ACM Design, Automation and Test in Europe Conference, Ser , pp. 1226-1231
    • Bjerregaard, T.1    Sparso, J.2
  • 4
    • 0141837018 scopus 로고    scopus 로고
    • Trends and challenges in vlsi circuit reliability
    • C. Constantinescu, "Trends and challenges in vlsi circuit reliability", Micro, vol. 23, no. 4, pp. 14-19, 2003.
    • (2003) Micro , vol.23 , Issue.4 , pp. 14-19
    • Constantinescu, C.1
  • 5
    • 0023346637 scopus 로고
    • Deadlock-free message routing in multiprocessor interconnection networks
    • May
    • W. Dally and C. Seitz, "Deadlock-free message routing in multiprocessor interconnection networks", Computers, IEEE Transactions on, vol. C-36, no. 5, pp. 547-553, May 1987.
    • (1987) Computers, IEEE Transactions On , vol.C-36 , Issue.5 , pp. 547-553
    • Dally, W.1    Seitz, C.2
  • 7
    • 79960204163 scopus 로고    scopus 로고
    • A survey of hard real-time scheduling for multiprocessor systems
    • Oct.
    • R. I. Davis and A. Burns, "A survey of hard real-time scheduling for multiprocessor systems", ACM Comput. Surv., vol. 43, no. 4, pp. 35:1-35:44, Oct. 2011.
    • (2011) ACM Comput. Surv. , vol.43 , Issue.4 , pp. 351-3544
    • Davis, R.I.1    Burns, A.2
  • 11
    • 27344456043 scopus 로고    scopus 로고
    • Aethereal network on chip: Concepts, architectures, and implementations
    • K. Goossens, J. Dielissen, and A. Radulescu, "Aethereal network on chip: concepts, architectures, and implementations", IEEE Design Test of Computers, vol. 22, no. 5, pp. 414-421, 2005.
    • (2005) IEEE Design Test of Computers , vol.22 , Issue.5 , pp. 414-421
    • Goossens, K.1    Dielissen, J.2    Radulescu, A.3
  • 12
    • 84904016006 scopus 로고    scopus 로고
    • Nov.
    • IBM, "Ibm ilog cplex optimizer", Nov. 2008, http://www-01.ibm.com/software/integration/optimization/cplex-optimizer/.
    • (2008) Ibm Ilog Cplex Optimizer
  • 16
    • 27944452666 scopus 로고    scopus 로고
    • Fault and energy-aware communication mapping with guaranteed latency for applications implemented on noc
    • S. Manolache, P. Eles, and Z. Peng, "Fault and energy-aware communication mapping with guaranteed latency for applications implemented on noc", in Design Automation Conference, Proceedings. 42nd, 2005, pp. 266-269.
    • (2005) Design Automation Conference, Proceedings. 42nd , pp. 266-269
    • Manolache, S.1    Eles, P.2    Peng, Z.3
  • 18
    • 9544237156 scopus 로고    scopus 로고
    • Hermes: An infrastructure for low area overhead packet-switching networks on chip
    • Oct.
    • F. Moraes, N. Calazans, A. Mello, L. Möller, and L. Ost, "Hermes: an infrastructure for low area overhead packet-switching networks on chip", Integr. VLSI J., vol. 38, no. 1, pp. 69-93, Oct. 2004.
    • (2004) Integr. VLSI J. , vol.38 , Issue.1 , pp. 69-93
    • Moraes, F.1    Calazans, N.2    Mello, A.3    Möller, L.4    Ost, L.5
  • 22
    • 79953200772 scopus 로고    scopus 로고
    • Branch-and-bound for model selection and its computational complexity
    • May
    • N. Thakoor and J. Gao, "Branch-and-bound for model selection and its computational complexity", IEEE Trans. on Knowledge and Data Engineering, vol. 23, no. 5, pp. 655-668, May 2011.
    • (2011) IEEE Trans. on Knowledge and Data Engineering , vol.23 , Issue.5 , pp. 655-668
    • Thakoor, N.1    Gao, J.2
  • 23
    • 0004180332 scopus 로고    scopus 로고
    • ser. Wiley-Interscience series in discrete mathematics and optimization. Wiley
    • L. Wolsey, Integer programming, ser. Wiley-Interscience series in discrete mathematics and optimization. Wiley, 1998.
    • (1998) Integer Programming
    • Wolsey, L.1
  • 25
    • 49749146713 scopus 로고    scopus 로고
    • Defect tolerance in homogeneous manycore processors using core-level redundancy with unified topology
    • ser. DATE, march
    • L. Zhang, Y. Han, Q. Xu, and X. Li, "Defect tolerance in homogeneous manycore processors using core-level redundancy with unified topology", in Proc. of IEEE/ACM Design, Automation and Test in Europe Conference, ser. DATE, march 2008, pp. 891-896.
    • (2008) Proc. of IEEE/ACM Design, Automation and Test in Europe Conference , pp. 891-896
    • Zhang, L.1    Han, Y.2    Xu, Q.3    Li, X.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.