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Volumn , Issue , 2014, Pages

Energy-efficient hardware acceleration through computing in the memory

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; HARDWARE; SCALABILITY;

EID: 84903828313     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/DATE2014.279     Document Type: Conference Paper
Times cited : (14)

References (12)
  • 1
    • 84903834082 scopus 로고    scopus 로고
    • Intl. Solid State Circuits Conference 2013 Tech Trends
    • Intl. Solid State Circuits Conference 2013 Tech Trends [Online] http: //isscc.org/trends/
  • 7
    • 79955430982 scopus 로고    scopus 로고
    • Challenges toward gigabit-scale spin-transfer torque random access memory and beyond for normally off, green information technology infrastructure
    • T. Kawahara, "Challenges toward gigabit-scale spin-transfer torque random access memory and beyond for normally off, green information technology infrastructure", Jnl. of Applied Phys., Vol. 109, No. 7, 2011.
    • (2011) Jnl. of Applied Phys. , vol.109 , Issue.7
    • Kawahara, T.1
  • 8
    • 0031238171 scopus 로고    scopus 로고
    • Scalable processors in the billion-transistor era: IRAM
    • C.E. Kozyrakis et al., "Scalable processors in the billion-transistor era: IRAM", Computer, Vol. 30, No. 9, 1997.
    • (1997) Computer , vol.30 , Issue.9
    • Kozyrakis, C.E.1
  • 9
    • 84903829093 scopus 로고    scopus 로고
    • Final Report: Processor-In-Memory (PIM) based Architectures for PetaFlops Potential Massively Parallel Processing
    • Final Report: Processor-In-Memory (PIM) based Architectures for PetaFlops Potential Massively Parallel Processing [Online] http://ntrs. nasa.gov/archive/nasa/casi.ntrs.nasa.g
  • 10
    • 81255149500 scopus 로고    scopus 로고
    • Energy-efficient reconfigurable computing using a circuit-architecture- software co-design approach
    • S. Paul et al., "Energy-Efficient Reconfigurable Computing Using a Circuit-Architecture-Software Co-Design Approach", IEEE Journal on Emerging and Selected Topics in Ckts. and Sys., Vol. 1, No. 3, 2011.
    • (2011) IEEE Journal on Emerging and Selected Topics in Ckts. and Sys. , vol.1 , Issue.3
    • Paul, S.1
  • 11
    • 71049154997 scopus 로고    scopus 로고
    • Multi-layered vertical gate NAND flash overcoming stacking limit for terabit density storage
    • June
    • W. Kim et al., "Multi-layered vertical gate NAND flash overcoming stacking limit for terabit density storage", Proc. VLSI Tech., June, 2009.
    • (2009) Proc. VLSI Tech.
    • Kim, W.1
  • 12
    • 84903841071 scopus 로고    scopus 로고
    • Micron 1Gb NAND Flash Data Sheet
    • Micron 1Gb NAND Flash Data Sheet [Online] http://download.micron. com/pdf/datasheets/flash/nand/1gb nand m48a.pdf


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.