A fault detection mechanism in a Data-flow scheduled Multithreaded processor

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2014, Pages

  Fu, Jian ^a,b   Yang, Qiang ^a,b   Poss, Raphael ^a   Jesshope, Chris R ^a   Zhang, Chunyuan ^b  

^a UNIVERSITY OF AMSTERDAM   (Netherlands)

^b NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

FAULT DETECTION; HARDWARE;

FAULT-DETECTION MECHANISMS; HARDWARE OVERHEADS; INTER-CORE COMMUNICATIONS; MULTI-CORE PROCESSOR; MULTI-THREADING; MULTITHREADED PROCESSORS; NUMBER OF THREADS; PROCESSING ELEMENTS;

DESIGN;

EID: 84903827273     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/DATE2014.076     Document Type: Conference Paper

References (13)

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