TLC: A tag-less cache for reducing dynamic first level cache energy

MICRO 2013 - Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture

Volumn , Issue , 2013, Pages 49-61

  Sembrant, Andreas ^a   Hagersten, Erik ^a   Black Shaffer, David ^a  

^a UPPSALA UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE DESIGN; CACHE ENERGY; DYNAMIC ENERGY; INDEX INFORMATION; MODERN PROCESSORS; PROCESSOR CORES; SET-ASSOCIATIVE CACHES; TAG ARRAYS;

COMPUTER ARCHITECTURE;

OPTIMIZATION;

EID: 84892559458     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2540708.2540714     Document Type: Conference Paper

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