Sequential 3D IC fabrication-Challenges and prospects

2006 Proceedings - 23rd International VLSI Multilevel Interconnection Conference, VMIC 2006

Volumn , Issue , 2006, Pages 101-107

  Rajendran, Bipin ^a  

^a Stanford University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

3-D INTEGRATED CIRCUIT; CHEMICAL VAPOR; CMOS DEVICES; LOW THERMAL BUDGET; PULSED LASER ANNEALING;

CHEMICAL VAPOR DEPOSITION; CMOS INTEGRATED CIRCUITS; THREE DIMENSIONAL;

FABRICATION;

EID: 84888226680     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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