메뉴 건너뛰기




Volumn 56, Issue 11, 2013, Pages 97-104

Centip3De: A many-core prototype exploring 3d integration and near-threshold computing

Author keywords

[No Author keywords available]

Indexed keywords

3D STACKING TECHNOLOGY; CHIP MULTIPROCESSOR; EXPONENTIAL INCREASE; GLOBAL INTERCONNECTS; NEAR-THRESHOLD COMPUTING; PERFORMANCE GAIN; THREE DIMENSIONAL (3D) INTEGRATION; THROUGH SILICON VIAS;

EID: 84887089342     PISSN: 00010782     EISSN: 15577317     Source Type: Journal    
DOI: 10.1145/2524713.2524725     Document Type: Article
Times cited : (8)

References (19)
  • 1
    • 84887121699 scopus 로고    scopus 로고
    • AR M Cortex-A9. http://www.arm. com/products/processors/cortex-a/cortex- a9.php.
    • AR M Cortex-A9
  • 2
    • 84887032834 scopus 로고    scopus 로고
    • AR M Cortex-M3. http://www.arm.com/products/CPUs/ARM-Cortex-M3.html.
    • AR M Cortex-M3
  • 6
    • 33748554808 scopus 로고    scopus 로고
    • Ultralow-voltage, minimum-energy CMOS
    • Jul/Sep
    • H anson, S., et al. Ultralow-voltage, minimum-energy CMOS. IBM J. Res. Dev. 50, 4/5 (Jul/Sep 2006), 469-490.
    • (2006) IBM J. Res. Dev , vol.50 , Issue.4-5 , pp. 469-490
    • Hanson, S.1
  • 7
    • 41549122836 scopus 로고    scopus 로고
    • Silicon odometer: An on-chip reliability monitor for measuring frequency degradation of digital circuits
    • Apr
    • K im, T.H., Persaud, R., Kim, C. Silicon odometer: an on-chip reliability monitor for measuring frequency degradation of digital circuits. IEEE J. Solid State Circ. 43, 4 (Apr. 2008), 874-880.
    • (2008) IEEE J. Solid State Circ. 43 , vol.4 , pp. 874-880
    • Kim, T.H.1    Persaud, R.2    Kim, C.3
  • 8
    • 61649110276 scopus 로고    scopus 로고
    • Threedimensional silicon integration
    • Nov
    • K nickerbocker, J.U., et al. Threedimensional silicon integration. IBM J. Res. Dev. 52, 6 (Nov. 2008), 553-569.
    • (2008) IBM J. Res. Dev , vol.52 , Issue.6 , pp. 553-569
    • Knickerbocker, J.U.1
  • 9
    • 52649125840 scopus 로고    scopus 로고
    • 3d-stacked memory architectures for multi-core processors, IEEE Computer Society
    • L oh, G. 3d-stacked memory architectures for multi-core processors. In ACM SIGARCH Computer Architecture News (2008), volume 36. IEEE Computer Society, 453-464.
    • (2008) ACM SIGARCH Computer Architecture News , vol.36 , pp. 453-464
    • Loh, G.1
  • 10
    • 78650885828 scopus 로고    scopus 로고
    • A 512 kb 8t sram macro operating down to 0.57 mv with an ac-coupled sense amplifier and embedded data-retention-voltage sensor in 45 nm soi cmos
    • Jan. 2011
    • Qazi, M., Stawiasz, K., Chang, L., Chandrakasan, A. A 512 kb 8t sram macro operating down to 0.57 mv with an ac-coupled sense amplifier and embedded data-retention-voltage sensor in 45 nm soi cmos. IEEE J. Solid State Circ. 46, 1 (Jan. 2011), 85-96.
    • IEEE J. Solid State Circ. 46 , vol.1 , pp. 85-96
    • Qazi, M.1    Stawiasz, K.2    Chang, L.3    Chandrakasan, A.4
  • 11
    • 70349285149 scopus 로고    scopus 로고
    • A 45 nm 8-core enterprise xeon processor
    • Feb
    • R usu, S., et al. A 45 nm 8-Core Enterprise Xeon Processor. In Proceedings of ISSCC (Feb. 2009).
    • (2009) Proceedings of ISSCC
    • Rusu, S.1
  • 13
    • 0015330654 scopus 로고
    • Ionimplanted complementary mos transistors in low-voltage circuits
    • Apr
    • S wanson, R., Meindl, J. Ionimplanted complementary mos transistors in low-voltage circuits. IEEE J. Solid State Circ. 7, 2 (Apr. 1972), 146-153.
    • (1972) IEEE J. Solid State Circ , vol.7 , pp. 146-153
    • Swanson, R.1    Meindl, J.2
  • 16
    • 0017503796 scopus 로고
    • Cmos analog integrated circuits based on weak inversion operations
    • Jun
    • V ittoz, E., Fellrath, J. Cmos analog integrated circuits based on weak inversion operations. IEEE J. Solid State Circ. 12, 3 (Jun. 1977), 224-231.
    • (1977) IEEE J. Solid State Circ , vol.12 , Issue.3 , pp. 224-231
    • Vittoz, E.1    Fellrath, J.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.