-
1
-
-
49549104151
-
ReSP: A Non-Intrusive Transaction-Level Reflective MPSoC Simulation Platform for Design Space Exploration
-
G. Beltrame, C. Bolchini, L. Fossati, A. Miele, and D. Sciuto. ReSP: A Non-Intrusive Transaction-Level Reflective MPSoC Simulation Platform for Design Space Exploration. In Proc. Asia and South Pacific Design Automation Conference, pages 673-678, 2008.
-
(2008)
Proc. Asia and South Pacific Design Automation Conference
, pp. 673-678
-
-
Beltrame, G.1
Bolchini, C.2
Fossati, L.3
Miele, A.4
Sciuto, D.5
-
2
-
-
27844588693
-
A framework for the functional verification of SystemC models
-
F. Bruschi, F. Ferrandi, and D. Sciuto. A framework for the functional verification of SystemC models. Int. Journ. on Parallel Programming, 33(6):667-695, 2005.
-
(2005)
Int. Journ. on Parallel Programming
, vol.33
, Issue.6
, pp. 667-695
-
-
Bruschi, F.1
Ferrandi, F.2
Sciuto, D.3
-
5
-
-
0001812235
-
Test routines based on symbolic logic statements
-
R. D. Eldred. Test routines based on symbolic logic statements. Journal of the ACM, 6(1):33-36, 1959.
-
(1959)
Journal of the ACM
, vol.6
, Issue.1
, pp. 33-36
-
-
Eldred, R.D.1
-
7
-
-
0742272649
-
Identification of design errors through functional testing
-
F. Ferrandi, F. Fummi, G. Pravadelli, and D. Sciuto. Identification of design errors through functional testing. IEEE Transactions on Reliability, 52(4):400-412, 2003.
-
(2003)
IEEE Transactions on Reliability
, vol.52
, Issue.4
, pp. 400-412
-
-
Ferrandi, F.1
Fummi, F.2
Pravadelli, G.3
Sciuto, D.4
-
8
-
-
79251635413
-
Laerte++: An object oriented high-level tpg for systemc designs
-
A. Fin and F. Fummi. Laerte++: an object oriented high-level tpg for systemc designs. In FDL'03, pages 105-117, 2003.
-
(2003)
FDL'03
, pp. 105-117
-
-
Fin, A.1
Fummi, F.2
-
9
-
-
0035681258
-
AMLETO: A multi-language environment for functional test generation
-
A. Fin, F. Fummi, and G. Pravadelli. AMLETO: a multi-language environment for functional test generation. In Proc. Intl. Test Conference, pages 821-829, 2001.
-
(2001)
Proc. Intl. Test Conference
, pp. 821-829
-
-
Fin, A.1
Fummi, F.2
Pravadelli, G.3
-
10
-
-
0031123369
-
Fault injection techniques and tools
-
M.-C. Hsueh, T. K. Tsai, and R. K. Iyer. Fault injection techniques and tools. Computer, 30(4):75-82, 1997.
-
(1997)
Computer
, vol.30
, Issue.4
, pp. 75-82
-
-
Hsueh, M.-C.1
Tsai, T.K.2
Iyer, R.K.3
-
12
-
-
34547964213
-
A Mixed Language Fault Simulation of VHDL and SystemC
-
S. Misera, H. T. Vierhaus, L. Breitenfeld, and A. Sieber. A Mixed Language Fault Simulation of VHDL and SystemC. In Proc. IEEE Euromicro Conf. on Digital System Design Architectures, Methods and Tools, pages 275-279, 2006.
-
(2006)
Proc. IEEE Euromicro Conf. on Digital System Design Architectures, Methods and Tools
, pp. 275-279
-
-
Misera, S.1
Vierhaus, H.T.2
Breitenfeld, L.3
Sieber, A.4
-
13
-
-
47749131568
-
Fault Injection Techniques and their Accelerated Simulation in SystemC
-
S. Misera, H. T. Vierhaus, and A. Sieber. Fault Injection Techniques and their Accelerated Simulation in SystemC. In Proc. IEEE Euromicro Conf. on Digital System Design Architectures, Methods and Tools, pages 587-595, 2007.
-
(2007)
Proc. IEEE Euromicro Conf. on Digital System Design Architectures, Methods and Tools
, pp. 587-595
-
-
Misera, S.1
Vierhaus, H.T.2
Sieber, A.3
-
14
-
-
84886732602
-
-
Open SystemC Initiative. www.systemc.org.
-
-
-
-
15
-
-
84886731147
-
-
Python. http://www.python.org.
-
-
-
-
16
-
-
13244289780
-
High level fault injection for attack simulation in smart cards
-
K. Rothbart, U. Neffe, C. Steger, R. Weiss, E. Rieger, and A. Muehlberger. High level fault injection for attack simulation in smart cards. In Proc. IEEE Asian Test Symp., pages 118-121, 2004.
-
(2004)
Proc. IEEE Asian Test Symp.
, pp. 118-121
-
-
Rothbart, K.1
Neffe, U.2
Steger, C.3
Weiss, R.4
Rieger, E.5
Muehlberger, A.6
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