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Volumn 33, Issue 6, 2005, Pages 667-695

A framework for the functional verification of SystemC models

Author keywords

Functional verification; SystemC; Test pattern generator

Indexed keywords

ERROR SIMULATION; FUNCTIONAL VERIFICATION; SYSTEMC; TEST PATTERN GENERATOR;

EID: 27844588693     PISSN: 08857458     EISSN: None     Source Type: Journal    
DOI: 10.1007/s10766-005-8908-x     Document Type: Article
Times cited : (18)

References (19)
  • 2
    • 84893796566 scopus 로고
    • Generation of design verification tests from behavioral VHDL programs using path enumeration and constraint programming
    • R. Vemuri and R. Kalyanaraman, Generation of Design Verification Tests from Behavioral VHDL Programs Using Path Enumeration and Constraint Programming, IEEE Trans. Very Large Scale Integration (VLSI) Systems 3(2):201-214 (1995).
    • (1995) IEEE Trans. Very Large Scale Integration (VLSI) Systems , vol.3 , Issue.2 , pp. 201-214
    • Vemuri, R.1    Kalyanaraman, R.2
  • 5
    • 0002063138 scopus 로고    scopus 로고
    • Automatic generation of functional vectors using the extended finite state machine model
    • K. Cheng and A. Krishnakumar, Automatic generation of functional vectors using the extended finite state machine model, ACM Trans. Design Automation Electronic Sys. 1(1):57-79 (1996).
    • (1996) ACM Trans. Design Automation Electronic Sys. , vol.1 , Issue.1 , pp. 57-79
    • Cheng, K.1    Krishnakumar, A.2
  • 10
    • 0035271698 scopus 로고    scopus 로고
    • Automatic test pattern generation for functional register-transfer level circuits using assignment decision diagrams
    • I. Ghosh and M. Fujita, Automatic Test Pattern Generation for Functional Register-Transfer Level Circuits using Assignment Decision Diagrams, IEEE Trans. Comput. Aided Design Integrated Circuits Sys. 20(3):402-415 (2001).
    • (2001) IEEE Trans. Comput. Aided Design Integrated Circuits Sys. , vol.20 , Issue.3 , pp. 402-415
    • Ghosh, I.1    Fujita, M.2
  • 11
    • 0032640870 scopus 로고    scopus 로고
    • Simulation vector generation from HDL descriptions for observability-enhanced statement coverage
    • F. Fallah, P. Ashar, and S. Devadas, Simulation Vector Generation from HDL Descriptions for Observability-enhanced Statement Coverage, in Proc. 35th Design Automation Conference (1999).
    • (1999) Proc. 35th Design Automation Conference
    • Fallah, F.1    Ashar, P.2    Devadas, S.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.