Concurrent error detection for orthogonal latin squares encoders and syndrome computation

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 21, Issue 12, 2013, Pages 2334-2338

  Reviriego, Pedro ^a   Pontarelli, Salvatore ^b   Maestro, Juan Antonio ^a  

^a UNIVERSIDAD ANTONIO DE NEBRIJA   (Spain)

^b UNIVERSITY OF ROME TOR VERGATA   (Italy)

Author keywords

Concurrent error detection; error correction codes (ECC); Latin squares; majority logic decoding (MLD); memory

Indexed keywords

CONCURRENT ERROR DETECTION; DECODING ALGORITHM; ERROR CORRECTION CODES; ERROR CORRECTION CODES (ECCS); LATIN SQUARE; MAJORITY LOGIC DECODING; MEMORY PROTECTION; ORTHOGONAL LATIN SQUARES;

DATA STORAGE EQUIPMENT; DECODING;

ERRORS;

EID: 84886596120     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2012.2230655     Document Type: Article

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