The design of a high speed low power phase locked loop

Proceedings of the Topical Workshop on Electronics for Particle Physics, TWEPP 2009

Volumn , Issue , 2009, Pages 476-480

  Liu, Tiankuan ^a   Gong, Datao ^a   Hou, Suen ^b   Liang, Zhihua ^a   Liu, Chonghan ^a   Su, Da Shung ^b   Teng, Ping Kun ^b   Xiang, Annie C ^a   Ye, Jingbo ^a  

^a SOUTHERN METHODIST UNIVERSITY   (United States)

^b INSTITUTE OF PHYSICS   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ATLAS LIQUID ARGON CALORIMETERS; DESIGN AND SIMULATION; HIGH-SPEED LOW-POWER; POST LAYOUT SIMULATION; RADIATION TOLERANT; SERIALIZERS; SILICON-ON-SAPPHIRE CMOS; TUNING RANGES;

CMOS INTEGRATED CIRCUITS;

LIQUEFIED GASES;

EID: 84884174117     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (30)

1. Arno Straessner, "Development of New Readout Electronics for the ATLAS LAr Calorimeter at the sLHC", presented at the topical workshop on electronics in particle physics (TWEPP), Paris, France, Sep. 21-25, 2009.
2. Datao Gong, Suen Hou, Zhihuan Liang, et al, "Development of a 16:1 serializer for data transmission at 5 Gbps", presented the topical workshop on electronics in particle physics (TWEPP), Paris, France, Sep. 21-25, 2009.
3. Peiqing Zhu, "Design and characterization of phase-locked loops for radiation-tolerant applications", PhD Dissertation, Department of Electrical Engineering, Southern Methodist University, Dallas, TX, 2008.
4. R. Reedy, J. Cable, D. Kelly, et al, "UTSi CMOS: A Complete RF SOI Solution", Analog Integrated Circuits and Signal Processing, vol. 25, pp. 171-179, 2000.
5. Tiankuan Liu, Wickham Chen, Ping Gui, et al., "Total Ionization Dose Effects and Single-Event Effects Studies Of a 0.25 um Silicon-On-Sapphire CMOS Technology", presented at the 9th European Conference Radiation and Its Effects on Components and Systems (RADECS), Deauville, France, Sep. 2007.
6. William O. Keese, "An Analysis and Performance Evaluation of a Passive Filter Design Technique for Charge Pump Phase-Locked Loops", National Semiconductor Application Note 1001, May 1996.
7. Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill Science/Engineering/Math; 1st edition, August 15, 2000.
8. Peregrine Semiconductor Corp., "GX Rev. 1.9 UltraCMOS" 0.25um Spice Models", Document No. 53-0023, Rev 04, 2007, San Diego, CA 92121, pp. 15-23.
9. Akinori Shinmyo, Masanori Hashimoto, Hidetoshi Onodera, "Design and Optimization of CMOS Current Mode Logic Dividers", 2004 EEE Asia-Pacific Conference on Advanced System Integrated Circuits (AP-ASIC2004), Aug. 4-5, 2004.
10. Behzad Razavi, Monolithic Phase-Locked Loops and Clock Recovery Circuits: Theory and Design, Wiley-IEEE Press, December 4, 2008.
11. Neil Roberts, "Phase Noise and Jitter - A Primer for Digital Designers," EEDesign, Jul. 14, 2003.
12. "Clock (CLK) Jitter and Phase Noise Conversion", Maxim Integrated Products Application Note 3359, Sep. 23, 2004.
13. Walt Kester, "Converting Oscillator Phase Noise to Time Jitter", MT-008 TUTORIAL, Rev. A, Oct. 2008, Analog Devices, Inc.
14. P. Mordra, T. Toifl, A. Kluge, G. Cervelli, F. Faccio, A. Marchioro and J. Christiansen, "G-Link and GigabitEthernet compliant serializer for LHC data transmission," IEEE Nuclear Science Symposium., vol. 2, pp. 96-99, Oct. 2000.
15. P. Moreiral, G. Cervelli, J. Christiansen, F. Faccio, A. Kluge, A. Marchioro and T. Toifl, "A Radiation Tolerant Gigabit Serializer for LHC Data Transmission" 2001, 7th Workshop on Electronics for LHC Experiments, Stockholm, Sweden, 10 - 14 Sep 2001, pp. 145-149 Subject category Detectors and Experimental Techniques
16. Tiankuan Liu, Wickham Chen, Ping Gui, et al, "Total Ionization Dose Effects and Single-Event Effects Studies Of a 0.25 um Silicon-On-Sapphire CMOS Technology", presented at the 9th European Conference Radiation and Its Effects on Components and Systems (RADECS), Deauville, France, Sep. 2007.
17. OKI technical Review, Oct.2004/Issue 200 Vol.71 No.4, http://www.oki.com/en/otr/200/downloads/otr-200-R18.pdf
18. Masakazu. Shoji, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL SC-21, NO. 5, OCTOBER 1986. 875. Elimination of Process-Dependent. Clock. Skew in. CMOS VLSI.
19. S. Tahmasbi Oskuii et al, "Comparative study on low-power high-performance standard-cell flip-flops" Microelectronics: Design, Technology, and Packaging, edited by Derek Abbott, Kamran Eshraghian, Charles A. Musca, Dimitris Pavlidis, Neil Weste, Proceedings of SPIE Vol. 5274 (SPIE, Bellingham, WA, 2004), 0277-7861
20. Ramanarayanan, R et al. "Analysis of soft error rate in flip-flops and scannable latches", SOC Conference, 2003. Proceedings. IEEE International [Systems-on-Chip] Volume, Issue, 17-20 Sept. 2003 Page(s): 231 - 234
21. J. Maneitas, "Low-jitter and process-independent DLL and PLL based on self-biased techniques," ISSCC Digest of Technical Papers, 1996.
22. L. Sun and T. Kwasniewski, "A 1.25 GHz 0.35um monolithic CMOS PLL clock generator for data communications," Proceedings of the IEEE Custom Integrated Circuits, pp.265-268, 1999.
23. D.-Y. Yeong, S.-H. Chai, W.-C. Song, and G.-H. Cho, "CMOS current-controlled oscillators using multiple-feedback architectures," in ISSCC Dig. Technical Papers, pp. 386-387, 1997.
24. J. Maneatis and M. Horowitz, "Multiple interconnected ring oscillator circuit," US Patent 5 475 344, Dec. 1995.
25. Heydari et al., Design of Ultra High-Speed CMOS CML buffers and Latches, IEEE International Symposium on Circuits and Systems (ISCAS), May 2003, 208-211
26. B. Terlemez, "Oscillation Control in CMOS Phase-Locked Loops" Georgia Institute of Technology, PhD thesis, USA 2005
27. C. Park and B. Kim, "A low-noise, 900-MHz VCO in 0.6-(im CMOS," /IEEE/Journal of Solid-State Circuits/, vol.34, pp. 586-591, May 1999.
28. Tiankuan Liu, Datao Gong, Suen Hou, et al, "The Design of a Low Power High Speed Phase Locked Loop", presented the topical workshop on electronics in particle physics (TWEPP), Paris, France, Sep. 21-25, 2009.
29. Arno Straessner, "Development of New Readout Electronics for the ATLAS LArCalorimeter at the sLHC", presented at the topical workshop on electronics in particle physics (TWEPP), Paris, France, Sep. 21-25, 2009.
30. Jan Troska et al, "The Versatile Transceiver Proof of Concept" presented the topical workshop on electronics in particle physics (TWEPP), Paris, France, Sep. 21-25, 2009.