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Volumn 39, Issue , 1996, Pages 130-131
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Low-jitter and process-independent DLL and PLL based on self-biased techniques
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Author keywords
[No Author keywords available]
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Indexed keywords
BUFFER CIRCUITS;
CAPACITORS;
CMOS INTEGRATED CIRCUITS;
DELAY CIRCUITS;
ELECTRIC DELAY LINES;
ELECTRIC FILTERS;
ELECTRIC NETWORK SYNTHESIS;
MOS DEVICES;
PERFORMANCE;
PHASE LOCKED LOOPS;
SPURIOUS SIGNAL NOISE;
VARIABLE FREQUENCY OSCILLATORS;
CHARGE PUMP CURRENT;
DELAY LOCKED LOOPS;
FIXED DAMPING FACTOR;
LOW INPUT TRACKING JITTER;
SELF BIASED TECHNIQUE;
VOLTAGE CONTROLLED DELAY LINE;
DIGITAL INTEGRATED CIRCUITS;
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EID: 0030083515
PISSN: 01936530
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
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Times cited : (42)
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References (4)
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